More README stuff

This commit is contained in:
Clifford Wolf 2015-06-28 12:20:23 +02:00
parent 4c15e05298
commit 923ac360ff
4 changed files with 55 additions and 0 deletions

View File

@ -57,6 +57,51 @@ non-branching instructions in an external coprocessor. An implementation
of a core that implements the `MUL[H[SU|U]]` instructions is provided.
Files in this Repository:
-------------------------
#### README.md
You are reading it right now.
#### picorv32.v
This Verilog file contains the following Verilog modules:
| Module | Description |
| ----------------------- | ------------------------------------------------------------- |
| `picorv32` | The PicoRV32 CPU |
| `picorv32_axi` | The version of the CPU with AXI4-Lite interface |
| `picorv32_axi_adapter` | Adapter from PicoRV32 Memory Interface to AXI4-Lite |
| `picorv32_pcpi_mul` | A PCPI core that implements the `MUL[H[SU|U]]` instructions |
Simply copy this file into your project.
#### Makefile and testbench.v
A basic test environment run `make test`, `make test_sp` and/or `make test_axi` to run
the test firmware in different environments.
#### firmware/
A simple test firmware. This runs the basic tests from `tests/`, some C code, tests IRQ
handling and the multiply PCPI core.
All the code in `firmware/` is in the public domain. Simply copy whatever you can use.
#### tests/
Simple instruction-level tests from [riscv-tests](https://github.com/riscv/riscv-tests).
#### dhrystone/
Another simple test firmware that runs the Dhrystome benchmark.
#### scripts/
Various scripts and examples for different (synthesis) tools and hardware architectures.
Parameters:
-----------

1
dhrystone/README Normal file
View File

@ -0,0 +1 @@
The Dhrystone benchmark and a verilog testbench to run it.

2
firmware/README Normal file
View File

@ -0,0 +1,2 @@
A simple test firmware. This code is in the public domain. Simply copy whatever
you can use.

View File

@ -1,3 +1,10 @@
// This is free and unencumbered software released into the public domain.
//
// Anyone is free to copy, modify, publish, use, compile, sell, or
// distribute this software, either in source code form or as a compiled
// binary, for any purpose, commercial or non-commercial, and by any
// means.
`timescale 1 ns / 1 ps
// `define VERBOSE
// `define AXI_TEST