From 9d6fdda1fa7e3e0472c8033a195eaa90084e6271 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Sat, 3 Dec 2016 12:48:00 +0100 Subject: [PATCH] Added cpu?_trap signals to tracecmp3.v --- scripts/smtbmc/tracecmp3.v | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/scripts/smtbmc/tracecmp3.v b/scripts/smtbmc/tracecmp3.v index ac9968c..a1bb63b 100644 --- a/scripts/smtbmc/tracecmp3.v +++ b/scripts/smtbmc/tracecmp3.v @@ -15,6 +15,7 @@ module testbench ( always @(posedge clk) resetn <= 1; + wire cpu0_trap; wire cpu0_mem_valid; wire cpu0_mem_instr; wire cpu0_mem_ready; @@ -25,6 +26,7 @@ module testbench ( wire cpu0_trace_valid; wire [35:0] cpu0_trace_data; + wire cpu1_trap; wire cpu1_mem_valid; wire cpu1_mem_instr; wire cpu1_mem_ready; @@ -91,6 +93,7 @@ module testbench ( ) cpu0 ( .clk (clk ), .resetn (resetn ), + .trap (cpu0_trap ), .mem_valid (cpu0_mem_valid ), .mem_instr (cpu0_mem_instr ), .mem_ready (cpu0_mem_ready ), @@ -118,6 +121,7 @@ module testbench ( ) cpu1 ( .clk (clk ), .resetn (resetn ), + .trap (cpu1_trap ), .mem_valid (cpu1_mem_valid ), .mem_instr (cpu1_mem_instr ), .mem_ready (cpu1_mem_ready ),