mirror of https://github.com/YosysHQ/picorv32.git
Add rvfi_halt and rvfi_intr to picorv32_axi and picorv32_wb
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@ -2395,6 +2395,8 @@ module picorv32_axi #(
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output [63:0] rvfi_order,
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output [63:0] rvfi_order,
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output [31:0] rvfi_insn,
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output [31:0] rvfi_insn,
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output rvfi_trap,
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output rvfi_trap,
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output rvfi_halt,
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output rvfi_intr,
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output [ 4:0] rvfi_rs1_addr,
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output [ 4:0] rvfi_rs1_addr,
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output [ 4:0] rvfi_rs2_addr,
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output [ 4:0] rvfi_rs2_addr,
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output [31:0] rvfi_rs1_rdata,
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output [31:0] rvfi_rs1_rdata,
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@ -2507,6 +2509,8 @@ module picorv32_axi #(
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.rvfi_order (rvfi_order ),
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.rvfi_order (rvfi_order ),
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.rvfi_insn (rvfi_insn ),
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.rvfi_insn (rvfi_insn ),
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.rvfi_trap (rvfi_trap ),
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.rvfi_trap (rvfi_trap ),
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.rvfi_halt (rvfi_halt ),
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.rvfi_intr (rvfi_intr ),
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.rvfi_rs1_addr (rvfi_rs1_addr ),
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.rvfi_rs1_addr (rvfi_rs1_addr ),
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.rvfi_rs2_addr (rvfi_rs2_addr ),
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.rvfi_rs2_addr (rvfi_rs2_addr ),
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.rvfi_rs1_rdata(rvfi_rs1_rdata),
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.rvfi_rs1_rdata(rvfi_rs1_rdata),
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@ -2677,6 +2681,8 @@ module picorv32_wb #(
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output [63:0] rvfi_order,
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output [63:0] rvfi_order,
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output [31:0] rvfi_insn,
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output [31:0] rvfi_insn,
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output rvfi_trap,
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output rvfi_trap,
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output rvfi_halt,
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output rvfi_intr,
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output [ 4:0] rvfi_rs1_addr,
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output [ 4:0] rvfi_rs1_addr,
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output [ 4:0] rvfi_rs2_addr,
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output [ 4:0] rvfi_rs2_addr,
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output [31:0] rvfi_rs1_rdata,
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output [31:0] rvfi_rs1_rdata,
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@ -2767,6 +2773,8 @@ module picorv32_wb #(
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.rvfi_order (rvfi_order ),
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.rvfi_order (rvfi_order ),
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.rvfi_insn (rvfi_insn ),
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.rvfi_insn (rvfi_insn ),
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.rvfi_trap (rvfi_trap ),
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.rvfi_trap (rvfi_trap ),
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.rvfi_halt (rvfi_halt ),
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.rvfi_intr (rvfi_intr ),
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.rvfi_rs1_addr (rvfi_rs1_addr ),
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.rvfi_rs1_addr (rvfi_rs1_addr ),
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.rvfi_rs2_addr (rvfi_rs2_addr ),
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.rvfi_rs2_addr (rvfi_rs2_addr ),
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.rvfi_rs1_rdata(rvfi_rs1_rdata),
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.rvfi_rs1_rdata(rvfi_rs1_rdata),
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