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picorv32
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Merge pull request #229 from flaviens/fence 

Bugfix: decode fence instruction
This commit is contained in:
Claire Xen 2023-11-16 16:38:19 +01:00 committed by GitHub
parent f00a88c36e 29102c00a8
commit c0acaebf0d
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1 changed files with 6 additions and 2 deletions
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picorv32.v
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@ -648,7 +648,7 @@ module picorv32 #(
reg instr_lb, instr_lh, instr_lw, instr_lbu, instr_lhu, instr_sb, instr_sh, instr_sw;
reg instr_addi, instr_slti, instr_sltiu, instr_xori, instr_ori, instr_andi, instr_slli, instr_srli, instr_srai;
reg instr_add, instr_sub, instr_sll, instr_slt, instr_sltu, instr_xor, instr_srl, instr_sra, instr_or, instr_and;
reg instr_rdcycle, instr_rdcycleh, instr_rdinstr, instr_rdinstrh, instr_ecall_ebreak;
reg instr_rdcycle, instr_rdcycleh, instr_rdinstr, instr_rdinstrh, instr_ecall_ebreak, instr_fence;
reg instr_getq, instr_setq, instr_retirq, instr_maskirq, instr_waitirq, instr_timer;
wire instr_trap;
@ -680,7 +680,7 @@ module picorv32 #(
instr_lb, instr_lh, instr_lw, instr_lbu, instr_lhu, instr_sb, instr_sh, instr_sw,
instr_addi, instr_slti, instr_sltiu, instr_xori, instr_ori, instr_andi, instr_slli, instr_srli, instr_srai,
instr_add, instr_sub, instr_sll, instr_slt, instr_sltu, instr_xor, instr_srl, instr_sra, instr_or, instr_and,
instr_rdcycle, instr_rdcycleh, instr_rdinstr, instr_rdinstrh,
instr_rdcycle, instr_rdcycleh, instr_rdinstr, instr_rdinstrh, instr_fence,
instr_getq, instr_setq, instr_retirq, instr_maskirq, instr_waitirq, instr_timer};
wire is_rdcycle_rdcycleh_rdinstr_rdinstrh;
@ -746,6 +746,7 @@ module picorv32 #(
if (instr_rdcycleh) new_ascii_instr = "rdcycleh";
if (instr_rdinstr) new_ascii_instr = "rdinstr";
if (instr_rdinstrh) new_ascii_instr = "rdinstrh";
if (instr_fence) new_ascii_instr = "fence";
if (instr_getq) new_ascii_instr = "getq";
if (instr_setq) new_ascii_instr = "setq";
@ -1083,6 +1084,7 @@ module picorv32 #(
instr_ecall_ebreak <= ((mem_rdata_q[6:0] == 7'b1110011 && !mem_rdata_q[31:21] && !mem_rdata_q[19:7]) ||
(COMPRESSED_ISA && mem_rdata_q[15:0] == 16'h9002));
instr_fence <= (mem_rdata_q[6:0] == 7'b0001111 && !mem_rdata_q[14:12]);
instr_getq <= mem_rdata_q[6:0] == 7'b0001011 && mem_rdata_q[31:25] == 7'b0000000 && ENABLE_IRQ && ENABLE_IRQ_QREGS;
instr_setq <= mem_rdata_q[6:0] == 7'b0001011 && mem_rdata_q[31:25] == 7'b0000001 && ENABLE_IRQ && ENABLE_IRQ_QREGS;
@ -1158,6 +1160,8 @@ module picorv32 #(
instr_sra <= 0;
instr_or <= 0;
instr_and <= 0;
instr_fence <= 0;
end
end