From c96ed77c4db17ce1347553b92151a7ae85b91c01 Mon Sep 17 00:00:00 2001
From: Tom Verbeure <tom_verbeure@yahoo.com>
Date: Mon, 29 Aug 2016 21:37:29 -0700
Subject: [PATCH] Make sim_system work

---
 scripts/quartus/.gitignore |  9 +--------
 scripts/quartus/Makefile   | 21 +++++++++------------
 2 files changed, 10 insertions(+), 20 deletions(-)

diff --git a/scripts/quartus/.gitignore b/scripts/quartus/.gitignore
index 2374269..d37ca0a 100644
--- a/scripts/quartus/.gitignore
+++ b/scripts/quartus/.gitignore
@@ -1,4 +1,3 @@
-.Xil/
 firmware.bin
 firmware.elf
 firmware.hex
@@ -9,10 +8,4 @@ synth_*.bit
 synth_system.v
 table.txt
 tab_*/
-webtalk.jou
-webtalk.log
-webtalk_*.jou
-webtalk_*.log
-xelab.*
-xsim.*
-xvlog.*
+system_tb
diff --git a/scripts/quartus/Makefile b/scripts/quartus/Makefile
index 4e109d2..7af582f 100644
--- a/scripts/quartus/Makefile
+++ b/scripts/quartus/Makefile
@@ -1,10 +1,9 @@
 
-VIVADO_BASE = /opt/Xilinx/Vivado/2016.1
-VIVADO = $(VIVADO_BASE)/bin/vivado
-XVLOG = $(VIVADO_BASE)/bin/xvlog
-XELAB = $(VIVADO_BASE)/bin/xelab
-GLBL = $(VIVADO_BASE)/data/verilog/src/glbl.v
-TOOLCHAIN_PREFIX = riscv64-unknown-elf-
+QUARTUS_ROOTDIR = /opt/altera_lite/16.0
+QUARTUS_BIN = $(QUARTUS_ROOTDIR)/quartus/bin
+
+VLOG = iverilog
+TOOLCHAIN_PREFIX = /opt/riscv32i/bin/riscv32-unknown-elf-
 
 export VIVADO
 
@@ -32,10 +31,9 @@ synth_%:
 
 synth_system: firmware.hex
 
-sim_system:
-	$(XVLOG) system_tb.v synth_system.v
-	$(XVLOG) $(GLBL)
-	$(XELAB) -L unifast_ver -L unisims_ver -R system_tb glbl
+sim_system: firmware.hex system_tb.v system.v ../../picorv32.v
+	$(VLOG) -o system_tb system_tb.v system.v ../../picorv32.v
+	./system_tb
 
 firmware.hex: firmware.S firmware.c firmware.lds
 	$(TOOLCHAIN_PREFIX)gcc -Os -m32 -ffreestanding -nostdlib -o firmware.elf firmware.S firmware.c \
@@ -59,7 +57,6 @@ table.txt:
 	bash table.sh > table.txt
 
 clean:
-	rm -rf .Xil/ firmware.bin firmware.elf firmware.hex firmware.map synth_*.log
+	rm -rf firmware.bin firmware.elf firmware.hex firmware.map synth_*.log
 	rm -rf synth_*.mmi synth_*.bit synth_system.v table.txt tab_*/ webtalk.jou
-	rm -rf webtalk.log webtalk_*.jou webtalk_*.log xelab.* xsim[._]* xvlog.*