mirror of https://github.com/YosysHQ/picorv32.git
Add plusargs support to testbench.cc
Signed-off-by: Claire Wolf <claire@symbioticeda.com>
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24
testbench.cc
24
testbench.cc
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@ -7,12 +7,25 @@ int main(int argc, char **argv, char **env)
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printf("Recommended: Verilator 4.0 or later.\n");
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printf("Recommended: Verilator 4.0 or later.\n");
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Verilated::commandArgs(argc, argv);
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Verilated::commandArgs(argc, argv);
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Verilated::traceEverOn(true);
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Vpicorv32_wrapper* top = new Vpicorv32_wrapper;
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Vpicorv32_wrapper* top = new Vpicorv32_wrapper;
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VerilatedVcdC* tfp = new VerilatedVcdC;
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// Tracing (vcd)
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VerilatedVcdC* tfp = NULL;
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const char* flag_vcd = Verilated::commandArgsPlusMatch("vcd");
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if (flag_vcd && 0==strcmp(flag_vcd, "+vcd")) {
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Verilated::traceEverOn(true);
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tfp = new VerilatedVcdC;
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top->trace (tfp, 99);
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top->trace (tfp, 99);
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tfp->open ("testbench.vcd");
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tfp->open("testbench.vcd");
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}
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// Tracing (data bus, see showtrace.py)
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FILE *trace_fd = NULL;
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const char* flag_trace = Verilated::commandArgsPlusMatch("trace");
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if (flag_trace && 0==strcmp(flag_trace, "+trace")) {
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trace_fd = fopen("testbench.trace", "w");
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}
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top->clk = 0;
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top->clk = 0;
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int t = 0;
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int t = 0;
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while (!Verilated::gotFinish()) {
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while (!Verilated::gotFinish()) {
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@ -20,10 +33,11 @@ int main(int argc, char **argv, char **env)
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top->resetn = 1;
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top->resetn = 1;
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top->clk = !top->clk;
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top->clk = !top->clk;
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top->eval();
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top->eval();
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tfp->dump (t);
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if (tfp) tfp->dump (t);
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if (trace_fd && top->clk && top->trace_valid) fprintf(trace_fd, "%9.9lx\n", top->trace_data);
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t += 5;
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t += 5;
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}
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}
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tfp->close();
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if (tfp) tfp->close();
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delete top;
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delete top;
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exit(0);
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exit(0);
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}
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}
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