mirror of https://github.com/YosysHQ/picorv32.git
Do not peek into core for cycle count in testbench
Signed-off-by: Clifford Wolf <clifford@clifford.at>
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@ -77,10 +77,13 @@ module picorv32_wrapper #(
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wire tests_passed;
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wire tests_passed;
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reg [31:0] irq;
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reg [31:0] irq;
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reg [15:0] count_cycle = 0;
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always @(posedge clk) count_cycle <= resetn ? count_cycle + 1 : 0;
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always @* begin
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always @* begin
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irq = 0;
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irq = 0;
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irq[4] = &uut.picorv32_core.count_cycle[12:0];
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irq[4] = &count_cycle[12:0];
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irq[5] = &uut.picorv32_core.count_cycle[15:0];
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irq[5] = &count_cycle[15:0];
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end
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end
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wire mem_axi_awvalid;
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wire mem_axi_awvalid;
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