From febb4b13183d89fbd7253a147408fcb9f9e3cca9 Mon Sep 17 00:00:00 2001 From: Clifford Wolf Date: Fri, 11 Aug 2017 16:15:07 +0200 Subject: [PATCH] Improve and cleanup picosoc firmware --- picosoc/.gitignore | 2 +- picosoc/Makefile | 14 +++++++------- picosoc/{firmware.s => firmware.S} | 31 ++++++++++++++++++------------ picosoc/sections.lds | 8 ++++++++ picosoc/testbench.v | 5 +++++ 5 files changed, 40 insertions(+), 20 deletions(-) rename picosoc/{firmware.s => firmware.S} (67%) create mode 100644 picosoc/sections.lds diff --git a/picosoc/.gitignore b/picosoc/.gitignore index cef6edf..ab0e16e 100644 --- a/picosoc/.gitignore +++ b/picosoc/.gitignore @@ -3,7 +3,7 @@ /spiflash_tb.vcd /spiflash_tb.vvp /firmware.elf -/firmware_vma.elf +/firmware_up.elf /firmware.hex /firmware.bin /hx8kdemo.asc diff --git a/picosoc/Makefile b/picosoc/Makefile index 8297a63..8c7a82c 100644 --- a/picosoc/Makefile +++ b/picosoc/Makefile @@ -46,14 +46,14 @@ hx8kdemo.bin: hx8kdemo.asc # ---- Example Firmware ---- -firmware.elf: firmware.s - riscv32-unknown-elf-gcc -c -o firmware.elf firmware.s +firmware.elf: sections.lds firmware.S + riscv32-unknown-elf-gcc -Wl,-Bstatic,-T,sections.lds,--strip-debug -ffreestanding -nostdlib -o firmware.elf firmware.S -firmware_vma.elf: firmware.elf - riscv32-unknown-elf-objcopy --change-section-vma .text=0x00100000 firmware.elf firmware_vma.elf +firmware_up.elf: firmware.elf + riscv32-unknown-elf-objcopy --change-addresses 0x100000 firmware.elf firmware_up.elf -firmware.hex: firmware_vma.elf - riscv32-unknown-elf-objcopy -O verilog firmware_vma.elf firmware.hex +firmware.hex: firmware_up.elf + riscv32-unknown-elf-objcopy -O verilog firmware_up.elf firmware.hex firmware.bin: firmware.elf riscv32-unknown-elf-objcopy -O binary firmware.elf firmware.bin @@ -62,7 +62,7 @@ firmware.bin: firmware.elf clean: rm -f testbench.vvp testbench.vcd spiflash_tb.vvp spiflash_tb.vcd - rm -f firmware.elf firmware_vma.elf firmware.hex firmware.bin + rm -f firmware.elf firmware_up.elf firmware.hex firmware.bin rm -f hx8kdemo.blif hx8kdemo.log hx8kdemo.asc hx8kdemo.rpt hx8kdemo.bin rm -f hx8kdemo_syn.v hx8kdemo_syn_tb.vvp hx8kdemo_tb.vvp diff --git a/picosoc/firmware.s b/picosoc/firmware.S similarity index 67% rename from picosoc/firmware.s rename to picosoc/firmware.S index d7cb3f9..362a5b0 100644 --- a/picosoc/firmware.s +++ b/picosoc/firmware.S @@ -1,5 +1,5 @@ -# write RAM code (a sequence of nops followed by ret) -li x5,0x00000013 # nop +// write RAM code (a sequence of nops followed by ret) +li x5,0x00000013 // nop sw x5,4(x0) sw x5,8(x0) sw x5,12(x0) @@ -48,38 +48,45 @@ sw x5,180(x0) sw x5,184(x0) sw x5,188(x0) sw x5,192(x0) -li x5,0x00008067 # ret +li x5,0x00008067 // ret sw x5,196(x0) -# setup gpio address in x5 +#if 0 +// switch spimemio to continous qspi ddr mode +li x5,0x02000000 +li x6,0x80000071 +sw x6,0(x5) +#endif + +// setup gpio address in x5 li x5,0x03000000 sw x0,0(x5) -# initial entry point into RAM code +// initial entry point into RAM code li x3,4 -# initialize RAM counter +// initialize RAM counter sw x0,0(x0) -# start of loop. remember this address +// start of loop. remember this address auipc x4,0 -# execute RAM code, come back here +// execute RAM code, come back here jalr x3 -# load counter and increment +// load counter and increment lw x6,0(x0) addi x6,x6,1 -# store counter and update gpios +// store counter and update gpios sw x6,0(x5) sw x6,0(x0) -# calculate new entry point into RAM code +// calculate new entry point into RAM code slli x3,x6,2 andi x3,x3,127 addi x3,x3,32 -# execute RAM code, come back to start of loop +// execute RAM code, come back to start of loop mv x1,x4 jr x3 diff --git a/picosoc/sections.lds b/picosoc/sections.lds new file mode 100644 index 0000000..5c92529 --- /dev/null +++ b/picosoc/sections.lds @@ -0,0 +1,8 @@ +SECTIONS { + .memory : { + . = 0x000000; + start*(.text); + *(.text); + *(*); + } +} diff --git a/picosoc/testbench.v b/picosoc/testbench.v index af5b121..a7e57de 100644 --- a/picosoc/testbench.v +++ b/picosoc/testbench.v @@ -24,6 +24,10 @@ module testbench; always #5 clk = (clk === 1'b0); reg resetn = 0; + integer cycles = 0; + + always @(posedge clk) + cycles <= cycles + 1; initial begin $dumpfile("testbench.vcd"); @@ -92,6 +96,7 @@ module testbench; $write("", gpio[7:0]); if (gpio == 63) begin $display("[OK]"); + $display("Finished after %0d cycles.", cycles); $finish; end if (gpio % 8 == 7) begin