Clifford Wolf
2fdafb9c16
Added BARREL_SHIFTER config parameter
2016-04-12 17:30:31 +02:00
Clifford Wolf
0e9bdd0082
Added Kintex/Virtex UltraScale to "make table.txt" in scripts/vivado/
2016-04-12 13:12:23 +02:00
Clifford Wolf
8d453a1dd4
Building the tools in sequence is much faster
2016-04-11 22:54:15 +02:00
Clifford Wolf
c9acf5a704
Added "make mrpoper" to scripts/torture/
2016-04-11 17:12:06 +02:00
Clifford Wolf
4026c2080c
Updated area stats
2016-04-11 17:06:15 +02:00
Clifford Wolf
b41c0e723c
Do not re-load a word to read the 16 bit opcode in the upper half
2016-04-11 16:48:57 +02:00
Clifford Wolf
b08d9400bd
Do not load next word when loading a 16 bit opcode from the upper half of a 32bit word
2016-04-11 14:32:25 +02:00
Clifford Wolf
99cff42b48
Updated README
2016-04-11 13:23:17 +02:00
Clifford Wolf
5d422d7637
Added "make build-tools"
2016-04-11 12:46:29 +02:00
Clifford Wolf
d74da1d108
Updated area stats
2016-04-10 17:24:00 +02:00
Clifford Wolf
2cab981862
Fixed signed division by zero handling
2016-04-10 17:15:17 +02:00
Clifford Wolf
094783dcf8
Added mul/div support to scripts/torture/
2016-04-10 16:55:45 +02:00
Clifford Wolf
472dae6b43
Updates dhrystone results
2016-04-10 16:55:10 +02:00
Clifford Wolf
00dd6ac38e
Added ENABLE_DIV and picorv32_pcpi_div
2016-04-10 16:54:35 +02:00
Clifford Wolf
8f58453109
Using compressed ISA in cxxdemo
2016-04-10 14:58:07 +02:00
Clifford Wolf
df1ae479e3
Support mem_la interface in torture test
2016-04-10 13:42:20 +02:00
Clifford Wolf
fce9656604
Bugfix in memory interface (related to compressed ISA)
2016-04-10 13:25:28 +02:00
Clifford Wolf
9a5d35c195
Using Verilator in torture test bench
2016-04-10 12:35:16 +02:00
Clifford Wolf
bc85a4c110
Updated riscv-gnu-toolchain (c.addi16sp bugfix)
2016-04-10 12:03:09 +02:00
Clifford Wolf
0d91dfa59e
Updated area table
2016-04-09 14:57:44 +02:00
Clifford Wolf
df7f5915d7
Added documentation for COMPRESSED_ISA parameter
2016-04-09 14:35:17 +02:00
Clifford Wolf
aa17d58784
Bugfix in C.SRAI implementation
2016-04-09 14:27:28 +02:00
Clifford Wolf
ef8014eebd
Bugfix in C.ADDI4SPN implementation
2016-04-09 14:09:43 +02:00
Clifford Wolf
f7435eca96
Improvements in scripts/torture/
2016-04-09 14:09:22 +02:00
Clifford Wolf
649faca27e
Work-around for c.addi16sp zero-imm gas bug (for torture test)
2016-04-09 13:25:29 +02:00
Clifford Wolf
55c4c3b102
Merge branch 'master' into compressed
2016-04-09 12:52:26 +02:00
Clifford Wolf
36cdf83b3f
Added "make clean" handling of riscv-gnu-toolchain-riscv32* directories
2016-04-09 12:51:50 +02:00
Clifford Wolf
579b60aef9
Added "make build-riscv32i-tools" and friends
2016-04-09 12:29:19 +02:00
Clifford Wolf
d657e732c6
Updated riscv-gnu-toolchain version
2016-04-09 00:17:00 +02:00
Clifford Wolf
24b299597a
Use RV32IC in scripts/torture/
2016-04-08 22:28:30 +02:00
Clifford Wolf
df25ba5831
Merge branch 'master' into compressed
2016-04-08 21:42:03 +02:00
Clifford Wolf
cb0f9df0d0
Added c_ebreak support to riscv-isa-sim-sbreak.diff
2016-04-08 21:41:32 +02:00
Clifford Wolf
b40f5864c1
Batch processing for scripts/torture/
2016-04-08 17:02:41 +02:00
Clifford Wolf
33c0aaf5de
Single test support in scripts/torture/
2016-04-08 16:08:23 +02:00
Clifford Wolf
548abd6cce
Added scripts/torture for riscv-torture tests
2016-04-06 16:38:57 +02:00
Clifford Wolf
c564a6fa87
Updated riscv-gnu-toolchain version
2016-04-06 12:08:08 +02:00
Clifford Wolf
7909b2a7d9
Merge branch 'master' into compressed
2016-04-05 11:59:42 +02:00
Clifford Wolf
3ccbf6877e
Added mem_wstrb documentation
2016-04-03 17:14:07 +02:00
Clifford Wolf
cceed2fbdf
Merge pull request #5 from neuschaefer/dev
...
README.md: Document the meaning of mem_instr
2016-04-03 17:07:45 +02:00
Jonathan Neuschäfer
3217152c1b
README.md: Document the meaning of mem_instr
2016-04-03 15:03:45 +02:00
Clifford Wolf
e630bedda4
Merge branch 'refactoring'
2016-03-02 12:52:06 +01:00
Clifford Wolf
714f7d9cfa
Merged axi4_memory.v and picorv32_wrapper.v back into testbench.v
2016-03-02 12:50:52 +01:00
Olof Kindgren
cd5d341e89
Add option to load alternative firmware with plusarg
2016-02-18 22:47:58 +01:00
Olof Kindgren
9591ae9f7d
Split out verilator-incompatible code to top-level testbench
...
Verilator doesn't handle verilog code that deals with time, such
as delayed signals or the repeat task. Clock and reset generation
are therefore moved to a separate file that can be replaced by
a verilator module. VCD generation is also affected by this.
2016-02-18 22:47:15 +01:00
Olof Kindgren
8343315aa7
Break out AXI4 memory to a separate module
...
This commit also adds support for setting the AXI_TEST and VERBOSE
defines as plusargs or parameters
2016-02-18 21:26:18 +01:00
Clifford Wolf
d4c81c5a15
Merge branch 'master' into compressed
2016-02-03 16:33:56 +01:00
Clifford Wolf
c4c477180e
Merged various testbench changes from compressed ISA branch
2016-02-03 16:33:01 +01:00
Clifford Wolf
d7894ca41a
Merge branch 'master' into compressed
...
Conflicts:
picorv32.v
2016-02-03 16:21:53 +01:00
Clifford Wolf
b1a24f4f89
minor README changes
2016-01-21 12:06:28 +01:00
Clifford Wolf
45d117fb87
Added ENABLE_FASTIRQ switch in start.S
2016-01-21 11:58:38 +01:00