upsilon/gateware/rtl/control_loop/yosys_test.sh

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2023-03-20 13:57:42 -04:00
yosys -p "plugin -i systemverilog" -p "read_systemverilog control_loop.v control_loop_math.v ../spi/spi_master_ss_no_write.v ../spi/spi_master_ss.v boothmul.v intsat.v ../spi/spi_master.v ../spi/spi_master_no_write.v" -p "synth_xilinx"