simulate and verify ram_fifo and ram_fifo_dual_port

firmware/rtl/raster/Makefile

@@ -2,12 +2,12 @@
 
 .PHONY: test clean
 
-RAM_FIFO_SRC= ram_fifo.v ram_fifo_sim.cpp FIFO36E1.v
+RAM_FIFO_SRC= ram_fifo.v ram_fifo_sim.cpp
 
+test: obj_dir/Vram_fifo
+	@./obj_dir/Vram_fifo && echo 'Vram_fifo successful'
 obj_dir/Vram_fifo.mk:
 	verilator --cc --exe -Wall --trace --trace-fst \
 		${RAM_FIFO_SRC}
 obj_dir/Vram_fifo: obj_dir/Vram_fifo.mk
 	cd obj_dir && make -f Vram_fifo.mk
-test: obj_dir/Vram_fifo
-	./obj_dir/Vram_fifo

firmware/rtl/raster/ram_fifo_dual_port.v

@@ -24,7 +24,7 @@ module ram_fifo_dual_port #(
 );
 
 reg [DAT_WID-1:0] memory [FIFO_DEPTH-1:0];
-initial memory[0] <= 24'b0;
+initial memory[0] = 24'b0;
 
 /* Read domain */
 

firmware/rtl/raster/ram_fifo_sim.cpp

@@ -8,7 +8,7 @@
 #include <unistd.h>
 
 #include <verilated.h>
-#include "Vraster_sim.h"
+#include "Vram_fifo.h"
 using ModType = Vram_fifo;
 ModType *mod;
 
@@ -35,54 +35,46 @@ static void init(int argc, char **argv) {
 	atexit(cleanup_exit);
 }
 
+static void init_values() {
+	mod->rst = 0;
+	mod->read_enable = 0;
+	mod->write_enable = 0;
+	mod->write_dat = 0;
+}
+
+#define MAX_VALS 32000/24
+uint32_t vals[MAX_VALS];
+
 static void push(uint32_t v) {
-	if (mod->full) {
+	mod->write_dat = v;
-		fprintf(stderr, "Fifo full at push %d\n", i);
-		exit(1);
-	}
-	mod->in_dat = v;
 	mod->write_enable = 1;
-	while (!mod->write_fin)
 	run_clock();
 	mod->write_enable = 0;
 	run_clock();
 }
 
 static void pop(int i) {
-	if (mod->empty) {
-		fprintf(stderr, "Fifo empty at pop %d\n", i);
-		exit(1);
-	}
 	mod->read_enable = 1;
-	while (!mod->read_fin)
 	run_clock();
 	mod->read_enable = 0;
 	run_clock();
 }
 
-#define MAX_VALS 32000/24
-uint32_t vals[MAX_VALS];
-
 int main(int argc, char **argv) {
 	init(argc, argv);
 	init_values();
-
-	mod->rst = 0;
-	mod->read_enable = 0;
-	mod->write_enable = 0;
-	mod->in_dat = 0;
 	run_clock();
 
 	/* Simple test */
 	for (int i = 0; i < MAX_VALS; i++) {
 		vals[i] = rand() & 0xFFFFFFFFFFFF;
-		push(vals[i], i);
+		push(vals[i]);
 	}
 
 	for (int i = 0; i < MAX_VALS; i++) {
 		pop(i);
-		if (mod->out_dat != vals[i]) {
+		if (mod->read_dat != vals[i]) {
-			fprintf(stderr, "expect %u, %u\n", vals[i], mod->out_dat);
+			fprintf(stderr, "expect %u, %u\n", vals[i], mod->read_dat);
 			return 1;
 		}
 	}