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reverify math

This commit is contained in:
Peter McGoron 2022-11-21 22:24:37 -05:00
parent 79cae3dd66
commit 5ff6b279b0
3 changed files with 26 additions and 7 deletions
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27
firmware/rtl/control_loop/control_loop_math.v
View File

@ -129,6 +129,19 @@ intsat #(
.outp(saturated_add) .outp(saturated_add)
); );
/************************
* Safely truncate down adjustment value.
***********************/
reg signed [CONSTS_WHOLE-1:0] adj_sat;
wire signed [DAC_WID-1:0] adj_final;
intsat #(
.IN_LEN(CONSTS_WHOLE),
.LTRUNC(CONSTS_WHOLE - DAC_WID)
) adj_saturate (
.inp(adj_sat),
.outp(adj_final)
);
/************************ /************************
* Safely calculate new DAC value. * Safely calculate new DAC value.
************************/ ************************/
@ -150,7 +163,8 @@ localparam CALCULATE_EPIDT = 3;
localparam CALCULATE_EP = 4; localparam CALCULATE_EP = 4;
localparam CALCULATE_A_PART_1 = 5; localparam CALCULATE_A_PART_1 = 5;
localparam CALCULATE_A_PART_2 = 6; localparam CALCULATE_A_PART_2 = 6;
localparam CALCULATE_NEW_DAC_VALUE = 10; localparam CALCULATE_NEW_DAC_VALUE_PART_1 = 10;
localparam CALCULATE_NEW_DAC_VALUE_PART_2 = 11;
localparam WAIT_ON_DISARM = 8; localparam WAIT_ON_DISARM = 8;
reg [4:0] state = WAIT_ON_ARM; reg [4:0] state = WAIT_ON_ARM;
@ -251,12 +265,15 @@ always @ (posedge clk) begin
end end
CALCULATE_A_PART_2: begin CALCULATE_A_PART_2: begin
add_sat <= tmpstore; add_sat <= tmpstore;
state <= CALCULATE_NEW_DAC_VALUE; state <= CALCULATE_NEW_DAC_VALUE_PART_1;
end end
CALCULATE_NEW_DAC_VALUE: begin CALCULATE_NEW_DAC_VALUE_PART_1: begin
add_sat_dac <= saturated_add[CONSTS_FRAC+DAC_WID-1:CONSTS_FRAC] adj_sat <= saturated_add[`CONSTS_WID-1:CONSTS_FRAC];
+ stored_dac_val;
adj_val <= saturated_add; adj_val <= saturated_add;
state <= CALCULATE_NEW_DAC_VALUE_PART_2;
end
CALCULATE_NEW_DAC_VALUE_PART_2: begin
add_sat_dac <= adj_final + stored_dac_val;
state <= WAIT_ON_DISARM; state <= WAIT_ON_DISARM;
end end
WAIT_ON_DISARM: begin WAIT_ON_DISARM: begin

2
firmware/rtl/control_loop/control_loop_math_sim.cpp
View File

@ -83,6 +83,7 @@ int main(int argc, char **argv) {
printf("running\n"); printf("running\n");
for (int i = 0; i < 200; i++) { for (int i = 0; i < 200; i++) {
mod->measured = func.val(setting); mod->measured = func.val(setting);
mod->stored_dac_val = setting;
calculate(); calculate();
mod->e_prev = mod->e_cur; mod->e_prev = mod->e_cur;
@ -100,6 +101,7 @@ int main(int argc, char **argv) {
printf("#%d: setting: %ld, measured: %ld, setpt: %ld, adj: %ld\n", i, setting, mod->measured, mod->setpt, adj); printf("#%d: setting: %ld, measured: %ld, setpt: %ld, adj: %ld\n", i, setting, mod->measured, mod->setpt, adj);
setting += adj; setting += adj;
printf("new_dac_val %ld %ld\n", setting, mod->new_dac_val);
} }
mod->final(); mod->final();

4
firmware/rtl/control_loop/control_loop_sim.cpp
View File

@ -59,7 +59,7 @@ int main(int argc, char **argv) {
set_value(10000, CONTROL_LOOP_SETPT); set_value(10000, CONTROL_LOOP_SETPT);
set_value(1, CONTROL_LOOP_STATUS); set_value(1, CONTROL_LOOP_STATUS);
for (int tick = 0; tick < 10000; tick++) { for (int tick = 0; tick < 100000; tick++) {
std::cout << tick << std::endl; std::cout << tick << std::endl;
run_clock(); run_clock();
if (mod->request && !mod->fulfilled) { if (mod->request && !mod->fulfilled) {
@ -69,7 +69,7 @@ int main(int argc, char **argv) {
mod->fulfilled = 0; mod->fulfilled = 0;
} }
if (tick == 5000) { if (tick == 50000) {
mod->cmd = CONTROL_LOOP_WRITE_BIT | CONTROL_LOOP_P; mod->cmd = CONTROL_LOOP_WRITE_BIT | CONTROL_LOOP_P;
mod->word_into_loop = 0b010111000010100011110101110000101000111; mod->word_into_loop = 0b010111000010100011110101110000101000111;
mod->start_cmd = 1; mod->start_cmd = 1;