remove test clock and fix make clean failing
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@ -6,4 +6,4 @@ base.v: base.v.m4
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lint: base.v
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verilator --lint-only base.v -I../spi -I../control_loop -I../waveform
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clean:
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rm base.v
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rm -f base.v
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@ -305,7 +305,6 @@ m4_dac_switch(DAC_PORTS, 7);
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initial test_clock <= 0;
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`define MAKE_TEST_CLOCK
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`ifdef MAKE_TEST_CLOCK
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reg [3-1:0] counter = 0;
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always @ (posedge clk) begin
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