From ba8c037181991cc4ef614df88936a6eb6f798deb Mon Sep 17 00:00:00 2001
From: Peter McGoron <code@mcgoron.com>
Date: Fri, 2 Jun 2023 16:40:55 -0400
Subject: [PATCH] opensbi

---
 opensbi/litex/vexriscv/Kconfig           |  9 +++++
 opensbi/litex/vexriscv/configs/defconfig | 24 +++++++++++++
 opensbi/litex/vexriscv/objects.mk        |  1 -
 opensbi/litex/vexriscv/platform.c        | 44 +++++++++++++++++++-----
 4 files changed, 68 insertions(+), 10 deletions(-)
 create mode 100644 opensbi/litex/vexriscv/Kconfig
 create mode 100644 opensbi/litex/vexriscv/configs/defconfig

diff --git a/opensbi/litex/vexriscv/Kconfig b/opensbi/litex/vexriscv/Kconfig
new file mode 100644
index 0000000..f81d111
--- /dev/null
+++ b/opensbi/litex/vexriscv/Kconfig
@@ -0,0 +1,9 @@
+# SPDX-License-Identifier: BSD-2-Clause
+
+config PLATFORM_LITEX_VEXRISCV
+	bool
+	select FDT
+	select FDT_SERIAL
+	select TIMER_MTIMER
+	select FDT_SERIAL_LITEX
+	default y
diff --git a/opensbi/litex/vexriscv/configs/defconfig b/opensbi/litex/vexriscv/configs/defconfig
new file mode 100644
index 0000000..90c2343
--- /dev/null
+++ b/opensbi/litex/vexriscv/configs/defconfig
@@ -0,0 +1,24 @@
+#
+# SPDX-License-Identifier: BSD-2-Clause
+#
+# Copyright (c) 2020 Florent Kermarrec <florent@enjoy-digital.fr>
+# Copyright (c) 2020 Dolu1990 <charles.papon.90@gmail.com>
+#
+
+# Command for platform specific "make run"
+platform-runcmd = echo LiteX/VexRiscv
+
+PLATFORM_RISCV_XLEN = 32
+PLATFORM_RISCV_ABI = ilp32
+PLATFORM_RISCV_ISA = rv32ima
+PLATFORM_RISCV_CODE_MODEL = medany
+
+# Blobs to build
+FW_TEXT_START=0x40F00000
+FW_DYNAMIC=y
+FW_JUMP=y
+FW_JUMP_ADDR=0x40000000
+FW_JUMP_FDT_ADDR=0x40EF0000
+FW_PAYLOAD=y
+FW_PAYLOAD_OFFSET=0x40000000
+FW_PAYLOAD_FDT_ADDR=0x40EF0000
diff --git a/opensbi/litex/vexriscv/objects.mk b/opensbi/litex/vexriscv/objects.mk
index 440994a..32f035c 100644
--- a/opensbi/litex/vexriscv/objects.mk
+++ b/opensbi/litex/vexriscv/objects.mk
@@ -5,4 +5,3 @@
 #
 
 platform-objs-y += platform.o
-platform-objs-y += litex.o
diff --git a/opensbi/litex/vexriscv/platform.c b/opensbi/litex/vexriscv/platform.c
index 9d64f65..54e23b7 100644
--- a/opensbi/litex/vexriscv/platform.c
+++ b/opensbi/litex/vexriscv/platform.c
@@ -11,19 +11,45 @@
 #include <sbi/sbi_const.h>
 #include <sbi/sbi_hart.h>
 #include <sbi/sbi_platform.h>
-#include <sbi_utils/serial/litex_serial.h>
-#include <sbi_utils/sys/clint.h>
+#include <sbi_utils/ipi/aclint_mswi.h>
+#include <sbi_utils/irqchip/plic.h>
+#include <sbi_utils/timer/aclint_mtimer.h>
+
+// LiteX VexRISC-V only supports CLINT, not updated ACLINT
 
 /* clang-format off */
 
 #define VEX_HART_COUNT         1
-#define VEX_PLATFORM_FEATURES  (SBI_PLATFORM_HAS_TIMER_VALUE | SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
+#define VEX_PLATFORM_FEATURES  (SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
+// hardcoded in SoC Generator
 #define VEX_CLINT_ADDR         0xF0010000
-#define VEX_HART_STACK_SIZE	   SBI_PLATFORM_DEFAULT_STACK_SIZE
+#define VEX_PLIC_ADDR          0xF0C00000
+#define VEX_HART_STACK_SIZE	   SBI_PLATFORM_DEFAULT_HART_STACK_SIZE
+#define VEX_MSWI_ADDR (VEX_CLINT_ADDR + CLINT_MSWI_OFFSET)
+#define VEX_MTIMER_ADDR (VEX_CLINT_ADDR + CLINT_MTIMER_OFFSET)
+#define VEX_MTIMER_FREQ 100000000 // XXX: System clock frequency?
 
 /* clang-format on */
 
-static struct clint_data clint = {VEX_CLINT_ADDR, 0, VEX_HART_COUNT, true};
+static struct aclint_mswi_data clint_mswi = {
+	.addr = VEX_CLINT_ADDR + CLINT_MSWI_OFFSET,
+	.first_hartid = 0,
+	.hart_count = VEX_HART_COUNT,
+	.size = ACLINT_MSWI_SIZE
+};
+
+static struct aclint_mtimer_data mtimer = {
+	.mtime_freq = VEX_MTIMER_FREQ,
+	.mtime_addr = VEX_MTIMER_ADDR +
+		      ACLINT_DEFAULT_MTIME_OFFSET,
+	.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
+	.mtimecmp_addr = VEX_MTIMER_ADDR +
+			 ACLINT_DEFAULT_MTIMECMP_OFFSET,
+	.mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
+	.first_hartid = 0,
+	.hart_count = VEX_HART_COUNT,
+	.has_64bit_mmio = true
+};
 
 static int vex_early_init(bool cold_boot)
 {
@@ -45,24 +71,24 @@ static int vex_ipi_init(bool cold_boot)
 	int rc;
 
 	if (cold_boot) {
-		rc = clint_cold_ipi_init(&clint);
+		rc = aclint_mswi_cold_init(&clint_mswi);
 		if (rc)
 			return rc;
 	}
 
-	return clint_warm_ipi_init();
+	return aclint_mswi_warm_init();
 }
 
 static int vex_timer_init(bool cold_boot)
 {
 	int rc;
 	if (cold_boot) {
-		rc = clint_cold_timer_init(&clint, NULL); /* Timer has no reference */
+		rc = aclint_mtimer_cold_init(&mtimer, NULL); /* Timer has no reference */
 		if (rc)
 			return rc;
 	}
 
-	return clint_warm_timer_init();
+	return aclint_mtimer_warm_init();
 }
 
 const struct sbi_platform_operations platform_ops = {