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The files "board/litex_vexriscv/linux.config" and
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"configs/litex_vexriscv_defconfig" incorporate code from
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https://github.com/litex-hub/linux-on-litex-vexriscv
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________________________________________________________________________
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BSD 2-Clause License
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Copyright (c) 2019-2021, Linux-on-LiteX-VexRiscv Developers
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice, this
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list of conditions and the following disclaimer.
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2. Redistributions in binary form must reproduce the above copyright notice,
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this list of conditions and the following disclaimer in the documentation
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and/or other materials provided with the distribution.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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CONFIG_SECTION_MISMATCH_WARN_ONLY=y
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# Architecture
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CONFIG_ARCH_DEFCONFIG="arch/riscv/configs/defconfig"
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CONFIG_NONPORTABLE=y
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CONFIG_ARCH_RV32I=y
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CONFIG_RISCV_ISA_M=y
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CONFIG_RISCV_ISA_A=y
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CONFIG_RISCV_ISA_C=n
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CONFIG_SIFIVE_PLIC=y
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CONFIG_FPU=n
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CONFIG_SMP=n
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CONFIG_STRICT_KERNEL_RWX=n
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CONFIG_EFI=n
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CONFIG_HVC_RISCV_SBI=y
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CONFIG_BLK_DEV_INITRD=y
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CONFIG_INITRAMFS_SOURCE=""
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CONFIG_RD_GZIP=y
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# FPGA / SoC
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CONFIG_FPGA=y
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CONFIG_FPGA_MGR_LITEX=y
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CONFIG_LITEX_SOC_CONTROLLER=y
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CONFIG_LITEX_SUBREG_SIZE=4
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# Time
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CONFIG_PRINTK_TIME=y
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# Clocking
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CONFIG_COMMON_CLK=y
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CONFIG_COMMON_CLK_LITEX=y
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# Interrupts
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CONFIG_IRQCHIP=y
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CONFIG_OF_IRQ=y
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CONFIG_HANDLE_DOMAIN_IRQ=y
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CONFIG_LITEX_VEXRISCV_INTC=y
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# Ethernet
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CONFIG_NET=y
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CONFIG_PACKET=y
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CONFIG_PACKET_DIAG=y
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CONFIG_INET=y
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CONFIG_NETDEVICES=y
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CONFIG_NET_VENDOR_LITEX=y
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CONFIG_LITEX_LITEETH=y
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# Serial
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CONFIG_SERIAL_EARLYCON_RISCV_SBI=y
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CONFIG_SERIAL_LITEUART=y
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CONFIG_SERIAL_LITEUART_CONSOLE=y
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# Hardware monitoring
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CONFIG_HWMON=y
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CONFIG_SENSORS_LITEX_HWMON=y
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# Framebuffer
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CONFIG_FB=y
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CONFIG_FB_SIMPLE=y
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CONFIG_FRAMEBUFFER_CONSOLE=y
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CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
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CONFIG_LOGO=y
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# .config in kernel
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CONFIG_IKCONFIG=y
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CONFIG_IKCONFIG_PROC=y
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# Filesystem
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CONFIG_TMPFS=y
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Upsilon on Linux, LiteX VexRiscV
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#Target options
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BR2_riscv=y
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BR2_RISCV_32=y
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# Instruction Set Extensions
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BR2_riscv_custom=y
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BR2_RISCV_ISA_CUSTOM_RVM=y
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BR2_RISCV_ISA_CUSTOM_RVA=y
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BR2_RISCV_ISA_CUSTOM_RVC=n
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BR2_RISCV_ABI_ILP32=y
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# GCC
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BR2_GCC_VERSION_10_X=y
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BR2_BINUTILS_VERSION_2_37_X=y
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# System
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BR2_TARGET_GENERIC_GETTY=y
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BR2_TARGET_GENERIC_GETTY_PORT="console"
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# Filesystem
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BR2_TARGET_ROOTFS_CPIO=y
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# Kernel (litex-rebase branch)
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BR2_LINUX_KERNEL=y
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BR2_LINUX_KERNEL_USE_CUSTOM_CONFIG=y
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BR2_LINUX_KERNEL_CUSTOM_CONFIG_FILE="$(BR2_EXTERNAL_UPSILON_PATH)/board/litex_vexriscv/linux.config"
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BR2_LINUX_KERNEL_IMAGE=y
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# Rootfs customisation
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BR2_ROOTFS_OVERLAY="$(BR2_EXTERNAL_UPSILON_PATH)/board/litex_vexriscv/rootfs_overlay"
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# Extra packages
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BR2_PACKAGE_MICROPYTHON=y
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BR2_PACKAGE_MICROPYTHON_LIB=y
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name: UPSILON
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