Peter McGoron
05f8878751
add submodules and switch
2023-03-03 08:06:50 +00:00
Peter McGoron
f536a41784
control_loop: remove reg keyword, yosys doesnt like it
2022-12-17 09:56:26 -05:00
Peter McGoron
33ec8351d8
correctly (and crudely) simulate control loop
...
Issue was that the ADC cycle half wait (SCK delay) was too fast
for the input buffering (since MISO and MOSI are physical inputs
and not FPGA wires).
2022-11-24 09:48:19 -05:00
Peter McGoron
adb81e201e
fix dac simulation
2022-11-21 22:56:40 -05:00
Peter McGoron
79cae3dd66
(somewhat) fix counter
2022-11-21 22:08:25 -05:00
Peter McGoron
cfb0f92528
fix adc_sim
2022-11-21 22:04:46 -05:00
Peter McGoron
5909f548d5
control loop simulator passes lint
2022-11-21 21:41:50 -05:00
Peter McGoron
0c10dc921c
more work on control_loop
...
* Make SPI masters internal to control loop module
* Rename commands to use I isntead of alpha
* add ADC value -> DAC value conversion to control loop math
2022-11-18 19:11:56 -05:00
Peter McGoron
3a23ac6e92
control_loop; add dirty bit to decrease the amount of comparisons
2022-11-17 19:14:24 -05:00
Peter McGoron
29e0e8dfb3
integrate control_loop_math into control_loop
2022-11-17 19:07:21 -05:00
Peter McGoron
45f815c5d3
changes
2022-11-11 21:57:58 -05:00
Peter McGoron
4f85146d61
add cycle count for each iteration
2022-10-23 14:21:31 -04:00
Peter McGoron
644929ef8a
move documentation to other file
2022-10-22 01:55:15 -04:00
Peter McGoron
91cbf56b02
integrate adding stored dac value into rtrunc
2022-10-22 01:52:58 -04:00
Peter McGoron
f361cac01b
make values update on the start of the control loop, and make resets only take effect after the control loop has completed an iteration
2022-10-21 17:38:07 -04:00
Peter McGoron
12686391ee
use integer saturation for dac value adjustment
2022-10-20 19:43:13 -04:00
Peter McGoron
2a300b9438
write total value to dac, not adjustment vlaue
2022-10-20 15:42:24 -04:00
Peter McGoron
c42e2fe419
add write-read interface to control loop
2022-10-18 07:10:06 -04:00
Peter McGoron
dc2b1fe339
move SPI master out of control loop design
2022-10-17 14:37:37 -04:00
Peter McGoron
029cc53c5f
some more changes
2022-10-17 00:44:30 -04:00
Peter McGoron
0298299402
add everything im working on
2022-09-16 18:01:34 -04:00
Peter McGoron