Peter McGoron 24f66c1a70 firmware/soc.py: switch to VexRiscV-SMP (with one core) to make litex happy		2023-05-30 17:32:04 -04:00
..
rtl	properly add boothmul	2023-05-30 14:46:45 -04:00
A7-constraints.xdc	cleanup	2022-07-12 13:30:28 -04:00
Makefile	firmware/Makefile: update	2023-05-30 16:50:30 -04:00
generate_csr_locations.py	proper CSR location generation	2023-05-16 15:02:05 -04:00
soc.py	firmware/soc.py: switch to VexRiscV-SMP (with one core) to make litex happy	2023-05-30 17:32:04 -04:00