upsilon/firmware/rtl
Peter McGoron 50ef091578 move preprocessed generation to common makefile 2023-03-16 16:32:03 +00:00
..
base pass yosys 2023-03-15 17:08:55 -04:00
control_loop pass yosys 2023-03-15 17:08:55 -04:00
raster raster simulate 2022-12-23 20:22:48 +00:00
spi move preprocessed generation to common makefile 2023-03-16 16:32:03 +00:00
waveform move preprocessed generation to common makefile 2023-03-16 16:32:03 +00:00
Makefile pass yosys 2023-03-15 17:08:55 -04:00
common.makefile move preprocessed generation to common makefile 2023-03-16 16:32:03 +00:00
testbench.hpp simulate waveform.v 2023-03-15 06:24:28 +00:00
util.hpp test and simulate spi_switch 2023-03-14 15:42:41 +00:00