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565847f7c5
upsilon
/
gateware
History
Peter McGoron
565847f7c5
merge ip changes
2024-01-20 20:28:43 +00:00
..
rtl
add bram
2024-01-20 15:23:40 -05:00
A7-constraints.xdc
firmware is a form of software; gateware is the equivalent for FGPAs
2023-06-14 15:31:49 -04:00
Makefile
use add_constant() to modify network settings in SoC
2024-01-18 10:41:51 -05:00
csr2mp.py
refactor compiles
2023-06-28 18:49:26 -04:00
mmio_descr.py
Fixed spacing in assignment
2023-08-08 17:06:36 -04:00
soc.py
merge ip changes
2024-01-20 20:28:43 +00:00