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Free and open source SoC for Scanning Probe Microscopy
2 Commits 2 Branches 0 Tags 895 KiB
Verilog 44.7%
Python 23.4%
C++ 11.8%
Tcl 7.6%
M4 5.7%
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Peter McGoron 98ee6cdecc import constraints 2022-07-11 12:02:16 -04:00
A7-constraints.xdc import constraints 2022-07-11 12:02:16 -04:00
soc.py add custom SoC generator 2022-07-10 19:28:32 -04:00