112 lines
2.6 KiB
C
112 lines
2.6 KiB
C
/*
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* SPDX-License-Identifier: BSD-2-Clause
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*
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* Copyright (c) 2020 Dolu1990 <charles.papon.90@gmail.com>
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*
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*/
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#include <sbi/riscv_asm.h>
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#include <sbi/riscv_encoding.h>
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#include <sbi/riscv_io.h>
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#include <sbi/sbi_const.h>
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#include <sbi/sbi_hart.h>
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#include <sbi/sbi_platform.h>
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#include <sbi_utils/ipi/aclint_mswi.h>
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#include <sbi_utils/irqchip/plic.h>
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#include <sbi_utils/timer/aclint_mtimer.h>
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// LiteX VexRISC-V only supports CLINT, not updated ACLINT
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/* clang-format off */
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#define VEX_HART_COUNT 1
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#define VEX_PLATFORM_FEATURES (SBI_PLATFORM_HAS_MFAULTS_DELEGATION)
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// hardcoded in SoC Generator
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#define VEX_CLINT_ADDR 0xF0010000
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#define VEX_PLIC_ADDR 0xF0C00000
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#define VEX_HART_STACK_SIZE SBI_PLATFORM_DEFAULT_HART_STACK_SIZE
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#define VEX_MSWI_ADDR (VEX_CLINT_ADDR + CLINT_MSWI_OFFSET)
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#define VEX_MTIMER_ADDR (VEX_CLINT_ADDR + CLINT_MTIMER_OFFSET)
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#define VEX_MTIMER_FREQ 100000000 // XXX: System clock frequency?
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/* clang-format on */
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static struct aclint_mswi_data clint_mswi = {
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.addr = VEX_CLINT_ADDR + CLINT_MSWI_OFFSET,
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.first_hartid = 0,
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.hart_count = VEX_HART_COUNT,
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.size = ACLINT_MSWI_SIZE
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};
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static struct aclint_mtimer_data mtimer = {
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.mtime_freq = VEX_MTIMER_FREQ,
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.mtime_addr = VEX_MTIMER_ADDR +
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ACLINT_DEFAULT_MTIME_OFFSET,
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.mtime_size = ACLINT_DEFAULT_MTIME_SIZE,
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.mtimecmp_addr = VEX_MTIMER_ADDR +
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ACLINT_DEFAULT_MTIMECMP_OFFSET,
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.mtimecmp_size = ACLINT_DEFAULT_MTIMECMP_SIZE,
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.first_hartid = 0,
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.hart_count = VEX_HART_COUNT,
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.has_64bit_mmio = true
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};
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static int vex_early_init(bool cold_boot)
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{
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return 0;
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}
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static int vex_final_init(bool cold_boot)
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{
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return 0;
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}
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static int vex_irqchip_init(bool cold_boot)
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{
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return 0;
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}
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static int vex_ipi_init(bool cold_boot)
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{
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int rc;
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if (cold_boot) {
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rc = aclint_mswi_cold_init(&clint_mswi);
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if (rc)
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return rc;
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}
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return aclint_mswi_warm_init();
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}
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static int vex_timer_init(bool cold_boot)
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{
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int rc;
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if (cold_boot) {
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rc = aclint_mtimer_cold_init(&mtimer, NULL); /* Timer has no reference */
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if (rc)
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return rc;
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}
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return aclint_mtimer_warm_init();
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}
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const struct sbi_platform_operations platform_ops = {
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.early_init = vex_early_init,
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.final_init = vex_final_init,
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.irqchip_init = vex_irqchip_init,
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.ipi_init = vex_ipi_init,
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.timer_init = vex_timer_init
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};
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const struct sbi_platform platform = {
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.opensbi_version = OPENSBI_VERSION,
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.platform_version = SBI_PLATFORM_VERSION(0x0, 0x01),
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.name = "LiteX / VexRiscv",
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.features = VEX_PLATFORM_FEATURES,
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.hart_count = VEX_HART_COUNT,
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.hart_stack_size = VEX_HART_STACK_SIZE,
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.platform_ops_addr = (unsigned long)&platform_ops
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};
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