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upsilon/gateware
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Peter McGoron 2e98c0229d Upsilon standard library; integrate waveform; overhaul code generation 
1. Add a new Upsilon MicroPython standard library in the linux/
   subdirectory. This puts all the submodules into classes with methods
   for ease of access.
2. Totally rewrite mmio.py code generation. Instead of just dumping
   registers, the build system now instantiates classes which
   encapsulate the module in question.
3. Split the PicoRV32 special register interface away from the PicoRV32.
   It is now the PeekPokeInterface, which will be used in the future to
   implement register control for Waveform and SPI.
4. Integrate Waveform into the design. Has not been tested yet.
 		2024-03-11 04:31:30 +00:00
..
rtl waveform: finish basic tests 2024-03-03 23:05:29 +00:00
A7-constraints.xdc firmware is a form of software; gateware is the equivalent for FGPAs 2023-06-14 15:31:49 -04:00
Makefile waveform: write and start simulation 2024-03-03 22:35:19 +00:00
config.py.def Get PicoRV32 to execute code 2024-02-25 18:58:34 +00:00
extio.py Upsilon standard library; integrate waveform; overhaul code generation 2024-03-11 04:31:30 +00:00
region.py Upsilon standard library; integrate waveform; overhaul code generation 2024-03-11 04:31:30 +00:00
soc.py Upsilon standard library; integrate waveform; overhaul code generation 2024-03-11 04:31:30 +00:00
swic.py Upsilon standard library; integrate waveform; overhaul code generation 2024-03-11 04:31:30 +00:00
util.py Upsilon standard library; integrate waveform; overhaul code generation 2024-03-11 04:31:30 +00:00