186 lines
6.7 KiB
Python
186 lines
6.7 KiB
Python
#!/usr/bin/python3
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# Copyright 2023 (C) Peter McGoron
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#
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# This file is a part of Upsilon, a free and open source software project.
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# For license terms, refer to the files in `doc/copying` in the Upsilon
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# source distribution.
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#######################################################################
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#
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# This file generates a Micropython module "mmio" with functions that
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# do raw reads and writes to MMIO registers.
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#
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# TODO: Devicetree?
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import argparse
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import json
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import sys
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class MMIORegister:
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def __init__(self, name, read_only=False, number=1, exntype=None):
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"""
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Describes a MMIO register.
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:param name: The name of the MMIO register. This name must be the
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same as the pin name used in ``csr.json``, except for any
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numerical suffix.
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:param read_only: True if the register is read only. Defaults to
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``False``.
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:param number: The number of MMIO registers with the same name
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and number suffixes. The number suffixes must go from 0
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to ``number - 1`` with no gaps.
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"""
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self.name = name
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self.read_only = read_only
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self.number = number
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self.exntype = exntype
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def mmio_factory(dac_num, exntype):
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def f(name, read_only=False):
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return MMIORegister(name, read_only, numer=dac_num, exntype=exntype)
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return f
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class MicroPythonCSRGenerator:
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def __init__(self, csrjson, bitwidthjson, registers, outf):
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"""
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This class generates a MicroPython wrapper for MMIO registers.
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:param csrjson: Filename of a LiteX "csr.json" file.
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:param bitwidthjson: Filename of an Upsilon "bitwidthjson" file.
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:param registers: A list of
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"""
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self.registers = registers
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self.csrs = json.load(open(csrjson))
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self.bws = json.load(open(bitwidthjson))
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self.file = outf
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def get_reg(self, name, num=None):
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""" Get the base address of the register. """
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if num is None:
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regname = f"base_{name}"
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else:
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regname = f"base_{name}_{num}"
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return self.csrs["csr_registers"][regname]["addr"]
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def get_accessor(self, name, num=None):
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""" Return a list of Micropython machine.mem accesses that can
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be used to read/write to a MMIO register.
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Since the Micropython API only supports accesses up to the
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natural word size of the processor, multiple accesses must be made
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for 64 bit registers.
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"""
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b = self.bws[name]
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if b <= 8:
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return [f'machine.mem8[{self.get_reg(name,num)}]']
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elif b <= 16:
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return [f'machine.mem16[{self.get_reg(name,num)}]']
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elif b <= 32:
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return [f'machine.mem32[{self.get_reg(name,num)}]']
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elif b <= 64:
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return [f'machine.mem32[{self.get_reg(name,num)}]',
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f'machine.mem32[{self.get_reg(name,num) + 4}]']
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else:
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raise Exception('unsupported width', b)
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def print(self, *args):
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print(*args, end='', file=self.file)
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def print_write_register(self, indent, varname, name, num):
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acc = self.get_accessor(name,num)
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if len(acc) == 1:
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self.print(f'{indent}{acc[0]} = {varname}\n')
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else:
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assert len(acc) == 2
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self.print(f'{indent}{acc[0]} = {varname} & 0xFFFFFFFF\n')
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self.print(f'{indent}{acc[1]} = {varname} >> 32\n')
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def print_read_register(self, indent, varname, name, num):
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acc = self.get_accessor(name,num)
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if len(acc) == 1:
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self.print(f'{indent}return {acc[0]}\n')
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else:
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assert len(acc) == 2
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self.print(f'{indent}return {acc[0]} | ({acc[1]} << 32)\n')
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def print_fun(self, optype, reg, pfun):
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"""Print out a read/write function for an MMIO register.
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:param optype: is set to "read" or "write" (the string).
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:param reg: is the dictionary containing the register info.
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:param pfun: is set to {self.print_write_register} or {self.print_read_register}
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"""
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name = reg['name']
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regnum = reg['total']
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exntype = reg['exntype]'
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self.print(f'def {optype}_{name}(')
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printed_argument = False
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if optype == 'write':
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self.print('val')
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printed_argument = True
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if regnum != 1:
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if printed_argument:
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self.print(', ')
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self.print('num')
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self.print('):\n')
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if regnum == 1:
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pfun('\t', 'val', name, None)
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else:
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for i in range(0,regnum):
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if i == 0:
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self.print(f'\tif ')
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else:
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self.print(f'\telif ')
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self.print(f'num == {i}:\n')
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pfun('\t\t', 'val', name, i)
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self.print(f'\telse:\n')
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self.print(f'\t\traise {exntype}(regnum)\n')
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self.print('\n')
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def print_file(self):
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self.print('import machine\n')
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self.print('class InvalidDACException(Exception):\n\tpass\n')
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self.print('class InvalidADCException(Exception):\n\tpass\n')
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for reg in self.registers:
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self.print_fun('read', reg, self.print_read_register)
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if not reg['read_only']:
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self.print_fun('write', reg, self.print_write_register)
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if __name__ == "__main__":
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dac_num = 8
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adc_num = 8
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dac_reg = mmio_factory(dac_num, "InvalidDACException")
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adc_reg = mmio_factory(adc_num, "InvalidADCException")
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registers = [
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dac_reg("dac_sel"),
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dac_reg("dac_finished", read_only=True),
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dac_reg("dac_arm"),
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dac_reg("dac_recv_buf", read_only=True),
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dac_reg("dac_send_buf"),
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adc_reg("adc_finished", read_only=True),
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adc_reg("adc_arm"),
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adc_reg("adc_recv_buf", read_only=True),
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adc_reg("adc_sel"),
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MMIORegister("cl_in_loop", read_only=True),
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MMIORegister("cl_cmd"),
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MMIORegister("cl_word_in"),
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MMIORegister("cl_start_cmd"),
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MMIORegister("cl_finish_cmd", read_only=True),
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# {"read_only": False, "name": "wf_arm", "total": dac_num},
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# {"read_only": False, "name": "wf_halt_on_finish", "total": dac_num},
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# {"read_only": True, "name": "wf_finished", "total": dac_num},
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# {"read_only": True, "name": "wf_running", "total": dac_num},
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# {"read_only": False, "name": "wf_time_to_wait", "total": dac_num},
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# {"read_only": False, "name": "wf_refresh_start", "total": dac_num},
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# {"read_only": True, "name": "wf_refresh_finished", "total": dac_num},
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# {"read_only": False, "name": "wf_start_addr", "total": dac_num},
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]
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MicroPythonCSRGenerator("csr.json", "csr_bitwidth.json", registers, sys.stdout).print_file()
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