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| author | 2022-10-23 04:42:35 -0400 | |
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| committer | 2022-10-23 04:42:35 -0400 | |
| commit | ab63321e3633ee47716249f4fcda24b456515849 (patch) | |
| tree | 1a153226b1f7f17a58b85d805cb783e9459f8442 /README.md | |
| parent | Booth multiplier (diff) | |
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| -rw-r--r-- | README.md | 23 |
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diff --git a/README.md b/README.md new file mode 100644 index 0000000..8df7cf8 --- /dev/null +++ b/README.md @@ -0,0 +1,23 @@ +# Booth Multiplier + +Sequentially multiply two signed twos-compliment integers in +Verilog using the [Booth Algorithm][1]. + +[1]: https://en.wikipedia.org/wiki/Booth%27s_multiplication_algorithm + +## License + +All source code is licensed under the CERN-OHL-W v2 or later. + +## Usage + +Set parameters `A1_LEN` and `A2_LEN` to the argument size of the +first and second integer. Set `A2LEN_SIZ` equal to +`floor(log2(A2_LEN) + 1)`. + +After inputting each integer, pulse `arm` and wait until `fin` goes +high to retreive the output in `outn`. + +## Simulating + +Simulation is done with Verilator. Run `make`. |
