add signed division IDIV

1 files changed, 80 insertions, 29 deletions

diff --git a/asm/test.py b/asm/test.py
index 1f66a4a..1274d9c 100644
--- a/asm/test.py
+++ b/asm/test.py
@@ -56,10 +56,8 @@ class PushTest(unittest.TestCase):
 		p = Program()
 		p.parse_asm_line("PUSH r0")
 		p.parse_asm_line("PUSH 6")
-		b = p()
 
-		ex = ffi.Environment()
-		self.assertEqual(ex.load(b), ffi.CompileRet.OK)
+		ex = ffi.Environment(p())
 		self.assertEqual(ex.cenv.prgend, 2)
 
 		self.assertEqual(ex.cenv.prg[0].opcode, 1)
@@ -83,19 +81,17 @@ class PushTest(unittest.TestCase):
 		stklen = 40
 		for n in range(0,stklen):
 			p.parse_asm_line("PUSH 5")
-		ex = ffi.Environment(stklen=stklen)
-		self.assertEqual(ex.load(p()), ffi.CompileRet.OK)
+		ex = ffi.Environment(p(), stklen=stklen)
 		self.assertEqual(ex(), ffi.RunRet.STOP)
 		for n in range(0,stklen):
-			self.assertEqual(ex.cenv.stk[n], 5)
+			self.assertEqual(ex.getstk(n), 5)
 
 	def test_push_overflow(self):
 		p = Program()
 		stklen = 40
 		for n in range(0, stklen + 1):
 			p.parse_asm_line("PUSH 5")
-		ex = ffi.Environment(stklen=stklen)
-		self.assertEqual(ex.load(p()), ffi.CompileRet.OK)
+		ex = ffi.Environment(p(), stklen=stklen)
 		self.assertEqual(ex(), ffi.RunRet.STACK_OVERFLOW)
 
 class PopTest(unittest.TestCase):
@@ -104,8 +100,7 @@ class PopTest(unittest.TestCase):
 		p.parse_asm_line("pop r9")
 		b = p()
 		self.assertEqual(b, b'\x02\xC2\x89\x00')
-		ex = ffi.Environment()
-		self.assertEqual(ex.load(b), ffi.CompileRet.OK)
+		ex = ffi.Environment(b)
 		self.assertEqual(ex.cenv.prgend, 1)
 
 		self.assertEqual(ex.cenv.prg[0].opcode, 2)
@@ -152,8 +147,7 @@ class PopTest(unittest.TestCase):
 	def test_pop_underflow(self):
 		p = Program()
 		p.parse_asm_line("pop r0")
-		ex = ffi.Environment()
-		self.assertEqual(ex.load(p()), ffi.CompileRet.OK)
+		ex = ffi.Environment(p())
 		self.assertEqual(ex(), ffi.RunRet.STACK_UNDERFLOW)
 
 	def test_pop_underflow_2(self):
@@ -161,16 +155,14 @@ class PopTest(unittest.TestCase):
 		p.parse_asm_line("push 5")
 		p.parse_asm_line("pop r0")
 		p.parse_asm_line("pop r1")
-		ex = ffi.Environment()
-		self.assertEqual(ex.load(p()), ffi.CompileRet.OK)
+		ex = ffi.Environment(p())
 		self.assertEqual(ex(), ffi.RunRet.STACK_UNDERFLOW)
 
 class AddTest(unittest.TestCase):
 	def test_exec_add(self):
 		p = Program()
 		p.parse_asm_line("add r0 1 1")
-		ex = ffi.Environment()
-		self.assertEqual(ex.load(p()), ffi.CompileRet.OK)
+		ex = ffi.Environment(p())
 		self.assertEqual(ex(), ffi.RunRet.STOP)
 		self.assertEqual(ex.cenv.reg[0], 2)
 
@@ -179,11 +171,10 @@ class AddTest(unittest.TestCase):
 		p.parse_asm_line("add r0 10 20")
 		p.parse_asm_line("add r1 5 0")
 		p.parse_asm_line("add r1 r0 -40")
-		ex = ffi.Environment()
-		self.assertEqual(ex.load(p()), ffi.CompileRet.OK)
+		ex = ffi.Environment(p())
 		self.assertEqual(ex(), ffi.RunRet.STOP)
-		self.assertEqual(ex.cenv.reg[0], 30)
-		self.assertEqual(ex.cenv.reg[1], word_2c(10))
+		self.assertEqual(ex.getreg(0), 30)
+		self.assertEqual(ex.getreg(1), -10)
 
 	def test_exec_add_throw_imm(self):
 		p = Program()
@@ -216,20 +207,18 @@ class MulTest(unittest.TestCase):
 	def test_exec_mul_imm_imm(self):
 		p = Program()
 		p.parse_asm_line("mul r0 2 2")
-		ex = ffi.Environment()
-		self.assertEqual(ex.load(p()), ffi.CompileRet.OK)
+		ex = ffi.Environment(p())
 		self.assertEqual(ex(), ffi.RunRet.STOP)
-		self.assertEqual(ex.cenv.reg[0], 4)
+		self.assertEqual(ex.getreg(0), 4)
 
 	def test_exec_mul_imm_neg_imm(self):
 		p = Program()
 		p.parse_asm_line("mul r0 -5 5")
 		p.parse_asm_line("mul r1 r0 -5")
-		ex = ffi.Environment()
-		self.assertEqual(ex.load(p()), ffi.CompileRet.OK)
+		ex = ffi.Environment(p())
 		self.assertEqual(ex(), ffi.RunRet.STOP)
-		self.assertEqual(ex.cenv.reg[0], word_2c(25))
-		self.assertEqual(ex.cenv.reg[1], 125)
+		self.assertEqual(ex.getreg(0), -25)
+		self.assertEqual(ex.getreg(1), 125)
 
 	def test_exec_mul_throw_imm(self):
 		p = Program()
@@ -258,6 +247,68 @@ class MulTest(unittest.TestCase):
 		self.assertEqual(cm.exception.i, 2)
 		self.assertEqual(cm.exception.opcode, 4)
 
+class DivTest(unittest.TestCase):
+	def test_div(self):
+		p = Program()
+		p.parse_asm_line("div r0 8 4")
+		ex = ffi.Environment(p())
+		self.assertEqual(ex(), ffi.RunRet.STOP)
+		self.assertEqual(ex.getreg(0), 2)
+
+	def test_div_round_down(self):
+		p = Program()
+		p.parse_asm_line("div r0 8 10")
+		ex = ffi.Environment(p())
+		self.assertEqual(ex(), ffi.RunRet.STOP)
+
+	def test_div_by_zero(self):
+		p = Program()
+		p.parse_asm_line("div r0 8 0")
+		ex = ffi.Environment(p())
+		self.assertEqual(ex(), ffi.RunRet.DIVIDE_BY_ZERO)
+
+	def test_idiv_by_zero(self):
+		p = Program()
+		p.parse_asm_line("idiv r0 8 0")
+		ex = ffi.Environment(p())
+		self.assertEqual(ex(), ffi.RunRet.DIVIDE_BY_ZERO)
+
+	def test_div_neg(self):
+		p = Program()
+		p.parse_asm_line("idiv r0 16 -4")
+		p.parse_asm_line("idiv r1 r0 -4")
+		ex = ffi.Environment(p())
+		self.assertEqual(ex(), ffi.RunRet.STOP)
+		self.assertEqual(ex.getreg(0), -4)
+		self.assertEqual(ex.getreg(1), 1)
+
+	def test_exec_div_throw_imm(self):
+		p = Program()
+		with self.assertRaises(TypecheckException) as cm:
+			p.parse_asm_line("div 5 1 2")
+		self.assertEqual(cm.exception.argtype, ArgType.REG)
+		self.assertEqual(cm.exception.sarg, '5')
+		self.assertEqual(cm.exception.i, 0)
+		self.assertEqual(cm.exception.opcode, 5)
+
+	def test_exec_div_throw_lab_1(self):
+		p = Program()
+		with self.assertRaises(TypecheckException) as cm:
+			p.parse_asm_line("div r0 l123 456")
+		self.assertEqual(cm.exception.argtype, ArgType.VAL)
+		self.assertEqual(cm.exception.sarg, 'l123')
+		self.assertEqual(cm.exception.i, 1)
+		self.assertEqual(cm.exception.opcode, 5)
+
+	def test_exec_div_throw_lab_2(self):
+		p = Program()
+		with self.assertRaises(TypecheckException) as cm:
+			p.parse_asm_line("div r5 1919 l24")
+		self.assertEqual(cm.exception.argtype, ArgType.VAL)
+		self.assertEqual(cm.exception.sarg, 'l24')
+		self.assertEqual(cm.exception.i, 2)
+		self.assertEqual(cm.exception.opcode, 5)
+
 class ProgramTest(unittest.TestCase):
 	def test_exec_simple_reg(self):
 		p = Program()
@@ -268,8 +319,8 @@ class ProgramTest(unittest.TestCase):
 		ex = ffi.Environment()
 		self.assertEqual(ex.load(p()), ffi.CompileRet.OK)
 		self.assertEqual(ex(), ffi.RunRet.STOP)
-		self.assertEqual(ex.cenv.reg[0], 6)
-		self.assertEqual(ex.cenv.reg[1], 5)
+		self.assertEqual(ex.getreg(0), 6)
+		self.assertEqual(ex.getreg(1), 5)
 
 if __name__ == "__main__":
 	unittest.main()