diff options
| author | 2023-02-11 17:11:32 +0000 | |
|---|---|---|
| committer | 2023-02-11 17:11:32 +0000 | |
| commit | 07347d1f663e6a85874324728d66bdb78f919e92 (patch) | |
| tree | ef41f3633174d130cfae3ba1d7fde88ecf292c1f /asm | |
| parent | comments and negative immediates (diff) | |
more add tests
Diffstat (limited to '')
| -rw-r--r-- | asm/creole.py | 6 | ||||
| -rw-r--r-- | asm/test.py | 82 |
2 files changed, 76 insertions, 12 deletions
diff --git a/asm/creole.py b/asm/creole.py index 2092773..e48d65f 100644 --- a/asm/creole.py +++ b/asm/creole.py @@ -83,9 +83,9 @@ class Instruction(Enum): NOP = 0 PUSH = 1, ArgType.VAL POP = 2, ArgType.REG - ADD = 3, ArgType.VAL, ArgType.VAL, ArgType.VAL - MUL = 4, ArgType.VAL, ArgType.VAL, ArgType.VAL - DIV = 5, ArgType.VAL, ArgType.VAL, ArgType.VAL + ADD = 3, ArgType.REG, ArgType.VAL, ArgType.VAL + MUL = 4, ArgType.REG, ArgType.VAL, ArgType.VAL + DIV = 5, ArgType.REG, ArgType.VAL, ArgType.VAL JL = 6, ArgType.LAB, ArgType.VAL, ArgType.VAL CLB = 7, ArgType.LAB SYS = 8, ArgType.VAL diff --git a/asm/test.py b/asm/test.py index e59d40c..73568cc 100644 --- a/asm/test.py +++ b/asm/test.py @@ -130,20 +130,16 @@ class PopTest(unittest.TestCase): self.assertEqual(cm.exception.insargs, []) self.assertEqual(cm.exception.argtypelen, 1) -class ProgramTest(unittest.TestCase): - def test_exec_simple_reg(self): +class AddTest(unittest.TestCase): + def test_exec_add(self): p = Program() - p.parse_asm_line("push 5") - p.parse_asm_line("push 6") - p.parse_asm_line("pop r0") - p.parse_asm_line("pop r1") + p.parse_asm_line("add r0 1 1") ex = ffi.Environment() self.assertEqual(ex.load(p()), ffi.CompileRet.OK) self.assertEqual(ex(), ffi.RunRet.STOP) - self.assertEqual(ex.cenv.reg[0], 6) - self.assertEqual(ex.cenv.reg[1], 5) + self.assertEqual(ex.cenv.reg[0], 2) - def test_exec_add(self): + def test_exec_add_neg(self): p = Program() p.parse_asm_line("add r0 10 20") p.parse_asm_line("add r1 5 0") @@ -154,5 +150,73 @@ class ProgramTest(unittest.TestCase): self.assertEqual(ex.cenv.reg[0], 30) self.assertEqual(ex.cenv.reg[1], word_2c(10)) +class AddTest(unittest.TestCase): + def test_exec_mul_throw_imm(self): + p = Program() + with self.assertRaises(TypecheckException) as cm: + p.parse_asm_line("add 5 6 7") + self.assertEqual(cm.exception.argtype, ArgType.REG) + self.assertEqual(cm.exception.sarg, '5') + self.assertEqual(cm.exception.i, 0) + self.assertEqual(cm.exception.opcode, 3) + + def test_exec_mul_throw_imm(self): + p = Program() + with self.assertRaises(TypecheckException) as cm: + p.parse_asm_line("add 5 6 7") + self.assertEqual(cm.exception.argtype, ArgType.REG) + self.assertEqual(cm.exception.sarg, '5') + self.assertEqual(cm.exception.i, 0) + self.assertEqual(cm.exception.opcode, 3) + + def test_exec_mul_throw_lab_1(self): + p = Program() + with self.assertRaises(TypecheckException) as cm: + p.parse_asm_line("add r0 l6 7") + self.assertEqual(cm.exception.argtype, ArgType.VAL) + self.assertEqual(cm.exception.sarg, 'l6') + self.assertEqual(cm.exception.i, 1) + self.assertEqual(cm.exception.opcode, 3) + + def test_exec_mul_throw_lab_2(self): + p = Program() + with self.assertRaises(TypecheckException) as cm: + p.parse_asm_line("add r0 12 l24") + self.assertEqual(cm.exception.argtype, ArgType.VAL) + self.assertEqual(cm.exception.sarg, 'l24') + self.assertEqual(cm.exception.i, 2) + self.assertEqual(cm.exception.opcode, 3) + + def test_exec_mul_imm_imm(self): + p = Program() + p.parse_asm_line("mul r0 2 2") + ex = ffi.Environment() + self.assertEqual(ex.load(p()), ffi.CompileRet.OK) + self.assertEqual(ex(), ffi.RunRet.STOP) + self.assertEqual(ex.cenv.reg[0], 4) + + def test_exec_mul_imm_neg_imm(self): + p = Program() + p.parse_asm_line("mul r0 -5 5") + p.parse_asm_line("mul r1 r0 -5") + ex = ffi.Environment() + self.assertEqual(ex.load(p()), ffi.CompileRet.OK) + self.assertEqual(ex(), ffi.RunRet.STOP) + self.assertEqual(ex.cenv.reg[0], word_2c(25)) + self.assertEqual(ex.cenv.reg[1], 125) + +class ProgramTest(unittest.TestCase): + def test_exec_simple_reg(self): + p = Program() + p.parse_asm_line("push 5") + p.parse_asm_line("push 6") + p.parse_asm_line("pop r0") + p.parse_asm_line("pop r1") + ex = ffi.Environment() + self.assertEqual(ex.load(p()), ffi.CompileRet.OK) + self.assertEqual(ex(), ffi.RunRet.STOP) + self.assertEqual(ex.cenv.reg[0], 6) + self.assertEqual(ex.cenv.reg[1], 5) + if __name__ == "__main__": unittest.main() |
