diff options
| author | 2023-02-07 17:44:44 +0000 | |
|---|---|---|
| committer | 2023-02-07 17:44:44 +0000 | |
| commit | a96bac26a853d8f130cf233c39ed6272f8358915 (patch) | |
| tree | c6ff30b3f7c08efea826a93a268837ecf03c259f /asm_test.py | |
| parent | more asm test (diff) | |
add label test
Diffstat (limited to '')
| -rw-r--r-- | asm_test.py | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/asm_test.py b/asm_test.py index 016f634..d03fc7d 100644 --- a/asm_test.py +++ b/asm_test.py @@ -18,6 +18,25 @@ class ProgramTest(unittest.TestCase): p.parse_asm_line("ADD r1 5 6") b = p() self.assertEqual(b, b'\x01\xC2\x81\x00\x03\xC2\x81\xC0\x85\xC0\x86\x00') + def test_label(self): + p = Program() + b_ex = bytes() + p.parse_asm_line("CLB l0") + b_ex = b_ex + b'\x07\xC0\x80\x00' + p.parse_asm_line("pop r0") + b_ex = b_ex + b'\x02\xC2\x80\x00' + p.parse_asm_line("pop r1") + b_ex = b_ex + b'\x02\xC2\x81\x00' + p.parse_asm_line("mul r2 r0 r1") + b_ex = b_ex + b'\x04\xC2\x82\xC2\x80\xC2\x81\x00' + p.parse_asm_line("push r2") + b_ex = b_ex + b'\x01\xC2\x82\x00' + p.parse_asm_line("push r2") + b_ex = b_ex + b'\x01\xC2\x82\x00' + p.parse_asm_line("jl l0 r2 10") + b_ex = b_ex + b'\x06\xC0\x80\xC2\x82\xC0\x8A\x00' + b = p() + self.assertEqual(b, b_ex) if __name__ == "__main__": unittest.main() |
