LiteX boards files
Updated 2024-11-21 02:40:03 -05:00
Compile Brainfuck to R5RS
Updated 2024-11-19 12:47:56 -05:00
Build your hardware, easily!
Updated 2024-11-18 06:40:24 -05:00
A FPGA friendly 32 bit RISC-V CPU implementation
Updated 2024-11-15 05:47:51 -05:00
Scheme macros for destructuring using multiple return values
Updated 2024-10-20 09:34:17 -04:00
Small footprint and configurable Ethernet core
Updated 2024-10-18 12:27:54 -04:00
FOSS Flow For FPGA
Updated 2024-10-15 12:15:18 -04:00
R7RS Scheme LISP compiler for GLLV bytecode, written to work in R3RS
Updated 2024-10-13 22:11:36 -04:00
Small footprint and configurable DRAM core
Updated 2024-09-27 03:34:36 -04:00
Small footprint and configurable embedded FPGA logic analyzer
Updated 2024-09-20 06:35:27 -04:00
Efficiently update a matplotlib graph over time
Updated 2024-09-16 10:10:34 -04:00
markov generator in scheme
Updated 2024-09-14 12:17:07 -04:00
R5RS portable library for a subset of R7RS define-library
Updated 2024-07-29 21:21:10 -04:00
HTTP to HTTPS proxy
Updated 2024-07-19 06:56:03 -04:00
Garbage collectors in C
Updated 2024-07-16 19:55:39 -04:00
C89 lisp implementation
Updated 2024-06-23 01:07:03 -04:00
PicoRV32 - A Size-Optimized RISC-V CPU
Updated 2024-06-17 02:20:13 -04:00
Upsilon build scripts using docker
Updated 2024-06-02 23:08:32 -04:00
Free and open source SoC for Scanning Probe Microscopy
Updated 2024-06-02 22:48:20 -04:00
single file, intrusive AA-tree balanced tree structure in C
Updated 2024-06-02 22:27:23 -04:00