LiteX boards files
Updated 2024-04-23 09:54:33 -04:00
FOSS Flow For FPGA
Updated 2024-04-22 20:16:30 -04:00
Build your hardware, easily!
Updated 2024-04-20 02:51:10 -04:00
Small footprint and configurable Ethernet core
Updated 2024-04-14 02:26:23 -04:00
A FPGA friendly 32 bit RISC-V CPU implementation
Updated 2024-04-04 04:51:43 -04:00
Example designs showing different ways to use F4PGA toolchains.
Updated 2024-03-27 07:22:52 -04:00
PicoRV32 - A Size-Optimized RISC-V CPU
Updated 2024-03-26 14:19:49 -04:00
Small footprint and configurable DRAM core
Updated 2024-03-25 14:06:08 -04:00
Random number generators in verilog
Updated 2024-02-20 20:33:34 -05:00
Verilog SPI
Updated 2024-01-27 23:09:00 -05:00
Small footprint and configurable embedded FPGA logic analyzer
Updated 2024-01-01 09:29:42 -05:00
Windows Local Backup
Updated 2023-12-12 18:21:02 -05:00
Javascript Huygens Principle animation
Updated 2023-10-13 16:57:32 -04:00
Free and open source SoC for Scanning Probe Microscopy
Updated 2023-06-28 19:09:21 -04:00
Python package for reading Bruker OPUS files.
Updated 2023-06-21 15:00:30 -04:00
Upsilon build scripts using docker
Updated 2023-06-09 12:26:22 -04:00
Programs to search the periodic table of the elements
Updated 2023-05-06 00:59:36 -04:00
Verilog Booth Multiplier
Updated 2023-04-21 13:41:11 -04:00
barebones bytecode interpreter in C
Updated 2023-04-08 11:22:41 -04:00
sederta comparability software
Updated 2022-09-26 13:41:00 -04:00