This test requires LiteX 2022.08. You will need to define `DEBUG` in the `boothmul.v`
file for the logic analyzer to work correctly.

Run `python3 soc.py` to build the design. Afterwards, load the design. Then run

    litex_server --uart --uart-port /dev/ttyUSB1

afterwards run

    python3 hardtest.py

This will generate two .vcd files, which you can check to verify that the multiplier
is working.