24 lines
854 B
C
24 lines
854 B
C
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#define CSR_REGISTER_BASE 0xfffff0000000ULL
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/* register offsets relative to CSR_REGISTER_BASE */
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#define CSR_STATE_CLEAR 0x0
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#define CSR_STATE_SET 0x4
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#define CSR_NODE_IDS 0x8
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#define CSR_RESET_START 0xc
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#define CSR_SPLIT_TIMEOUT_HI 0x18
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#define CSR_SPLIT_TIMEOUT_LO 0x1c
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#define CSR_CYCLE_TIME 0x200
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#define CSR_BUS_TIME 0x204
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#define CSR_BUSY_TIMEOUT 0x210
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#define CSR_BUS_MANAGER_ID 0x21c
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#define CSR_BANDWIDTH_AVAILABLE 0x220
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#define CSR_CHANNELS_AVAILABLE_HI 0x224
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#define CSR_CHANNELS_AVAILABLE_LO 0x228
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#define CSR_CONFIG_ROM 0x400
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#define CSR_CONFIG_ROM_END 0x800
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#define CSR_TOPOLOGY_MAP 0x1000
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#define CSR_TOPOLOGY_MAP_END 0x1400
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#define CSR_SPEED_MAP 0x2000
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#define CSR_SPEED_MAP_END 0x3000
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