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autogenerate mode tests

This commit is contained in:
Peter McGoron 2022-07-21 13:00:09 -04:00
parent a38631cd17
commit 1b612a75e7
11 changed files with 16 additions and 126 deletions
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6
tests/Makefile
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@ -1,7 +1,9 @@
MODES=00 01 10 11
all: all:
for i in 00 01 10 11; do \ for i in ${MODES}; do \
make -f run_mode.makefile MODE="$$i"; \ make -f run_mode.makefile MODE="$$i"; \
done done
clean: clean:
rm -rf obj_dir rm -rf obj_dir mode[01][01]*

3
tests/mode00.cpp
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@ -1,3 +0,0 @@
#include "Vmode00.h"
using TopModule = Vmode00;
#include "write_read.cpp"

34
tests/mode00.v
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@ -1,34 +0,0 @@
/* (c) Peter McGoron 2022
* This Source Code Form is subject to the terms of the Mozilla Public
* License, v.2.0. If a copy of the MPL was not distributed with this
* file, You can obtain one at https://mozilla.org/MPL/2.0/.
*/
module mode00 (
input clk,
input [23:0] data_ctrl,
input activate,
input ss,
input rdy,
output master_finished
);
spi_write_read
#(
.POLARITY(0),
.PHASE(0)
) base (
.clk(clk),
.data_ctrl(data_ctrl),
.activate(activate),
.master_finished(master_finished),
.ss(ss),
.rdy(rdy)
);
initial begin
$dumpfile("mode00.vcd");
$dumpvars();
end
endmodule

3
tests/mode01.cpp
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@ -1,3 +0,0 @@
#include "Vmode01.h"
using TopModule = Vmode01;
#include "write_read.cpp"

34
tests/mode01.v
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@ -1,34 +0,0 @@
/* (c) Peter McGoron 2022
* This Source Code Form is subject to the terms of the Mozilla Public
* License, v.2.0. If a copy of the MPL was not distributed with this
* file, You can obtain one at https://mozilla.org/MPL/2.0/.
*/
module mode01 (
input clk,
input [23:0] data_ctrl,
input activate,
input ss,
input rdy,
output master_finished
);
spi_write_read
#(
.POLARITY(0),
.PHASE(1)
) base (
.clk(clk),
.data_ctrl(data_ctrl),
.activate(activate),
.master_finished(master_finished),
.ss(ss),
.rdy(rdy)
);
initial begin
$dumpfile("mode01.vcd");
$dumpvars();
end
endmodule

3
tests/mode10.cpp
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@ -1,3 +0,0 @@
#include "Vmode10.h"
using TopModule = Vmode10;
#include "write_read.cpp"

3
tests/mode11.cpp
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@ -1,3 +0,0 @@
#include "Vmode11.h"
using TopModule = Vmode11;
#include "write_read.cpp"

34
tests/mode11.v
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@ -1,34 +0,0 @@
/* (c) Peter McGoron 2022
* This Source Code Form is subject to the terms of the Mozilla Public
* License, v.2.0. If a copy of the MPL was not distributed with this
* file, You can obtain one at https://mozilla.org/MPL/2.0/.
*/
module mode11 (
input clk,
input [23:0] data_ctrl,
input activate,
input ss,
input rdy,
output master_finished
);
spi_write_read
#(
.POLARITY(1),
.PHASE(1)
) base (
.clk(clk),
.data_ctrl(data_ctrl),
.activate(activate),
.master_finished(master_finished),
.ss(ss),
.rdy(rdy)
);
initial begin
$dumpfile("mode11.vcd");
$dumpvars();
end
endmodule

3
tests/mode_template.cpp Normal file
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@ -0,0 +1,3 @@
#include "Vmode@MODE@.h"
using TopModule = Vmode@MODE@;
#include "write_read.cpp"

8
tests/mode10.v → tests/mode_template.v
View File

@ -4,7 +4,7 @@
* file, You can obtain one at https://mozilla.org/MPL/2.0/. * file, You can obtain one at https://mozilla.org/MPL/2.0/.
*/ */
module mode10 ( module mode@MODE@ (
input clk, input clk,
input [23:0] data_ctrl, input [23:0] data_ctrl,
input activate, input activate,
@ -15,8 +15,8 @@ module mode10 (
spi_write_read spi_write_read
#( #(
.POLARITY(1), .POLARITY(@POLARITY@),
.PHASE(0) .PHASE(@PHASE@)
) base ( ) base (
.clk(clk), .clk(clk),
.data_ctrl(data_ctrl), .data_ctrl(data_ctrl),
@ -27,7 +27,7 @@ spi_write_read
); );
initial begin initial begin
$dumpfile("mode10.vcd"); $dumpfile("mode@MODE@.vcd");
$dumpvars(); $dumpvars();
end end

11
tests/run_mode.makefile
View File

@ -11,15 +11,14 @@ WAVEFILE=${TESTBENCH_BASE}.vcd
FILES=${TESTBENCH_BASE}.v ${AUXFILES} ${CPP_TESTBENCH} FILES=${TESTBENCH_BASE}.v ${AUXFILES} ${CPP_TESTBENCH}
all: obj_dir/V${TESTBENCH_BASE} ${WAVEFILE}: obj_dir/V${TESTBENCH_BASE}
./obj_dir/V${TESTBENCH_BASE} ./obj_dir/V${TESTBENCH_BASE}
obj_dir/V${TESTBENCH_BASE}.mk: ${FILES} obj_dir/V${TESTBENCH_BASE}.mk: ${FILES}
verilator -CFLAGS -Wall -Wno-unused -Wpedantic --trace --cc --exe ${FILES} --top ${TESTBENCH_BASE} verilator -CFLAGS -Wall -Wno-unused -Wpedantic --trace --cc --exe ${FILES} --top ${TESTBENCH_BASE}
obj_dir/V${TESTBENCH_BASE}: obj_dir/V${TESTBENCH_BASE}.mk obj_dir/V${TESTBENCH_BASE}: obj_dir/V${TESTBENCH_BASE}.mk
make -C obj_dir -f V${TESTBENCH_BASE}.mk make -C obj_dir -f V${TESTBENCH_BASE}.mk
${TESTBENCH_BASE}.v: mode_template.v
run: sed "s/@PHASE@/`echo ${MODE} | cut -c 2`/g; s/@POLARITY@/`echo ${MODE} | cut -c 1`/g; s/@MODE@/${MODE}/g" mode_template.v > ${TESTBENCH_BASE}.v
./obj_dir/V${TESTBENCH_CASE} ${TESTBENCH_BASE}.cpp: mode_template.cpp
clean: sed "s/@PHASE@/`echo ${MODE} | cut -c 2`/g; s/@POLARITY@/`echo ${MODE} | cut -c 1`/g; s/@MODE@/${MODE}/g" mode_template.cpp > ${TESTBENCH_BASE}.cpp
$(RM) obj_dir/*