add error return for tests

This commit is contained in:
Peter McGoron 2022-10-23 14:03:29 -04:00
parent 9bbe1407ba
commit e65cb07b75
2 changed files with 13 additions and 12 deletions

View File

@ -21,7 +21,8 @@ run_test() {
-DVCDFILE="\"$DIR.fst\"" \ -DVCDFILE="\"$DIR.fst\"" \
--Mdir $DIR \ --Mdir $DIR \
$EXTARG \ $EXTARG \
simtop.v write_read.cpp $MODS simtop.v write_read.cpp $MODS \
|| exit 1
cd "$DIR" cd "$DIR"
make -f Vsimtop.mk make -f Vsimtop.mk
@ -35,7 +36,7 @@ for POL in 0 1; do
spi_master spi_slave \ spi_master spi_slave \
simtop_$POL$PHASE 24 \ simtop_$POL$PHASE 24 \
"../spi_master.v ../spi_slave.v" "../spi_master.v ../spi_slave.v"
) ) || exit 1
( \ ( \
run_test $POL $PHASE \ run_test $POL $PHASE \
@ -43,7 +44,7 @@ for POL in 0 1; do
simtop_ss$POL$PHASE 24 \ simtop_ss$POL$PHASE 24 \
"../spi_master_ss.v ../spi_slave.v" \ "../spi_master_ss.v ../spi_slave.v" \
"-DSPI_MASTER_SS -CFLAGS -DSPI_MASTER_SS" "-DSPI_MASTER_SS -CFLAGS -DSPI_MASTER_SS"
) ) || exit 1
( \ ( \
run_test $POL $PHASE \ run_test $POL $PHASE \
@ -51,7 +52,7 @@ for POL in 0 1; do
simtop_no_write_$POL$PHASE 24 \ simtop_no_write_$POL$PHASE 24 \
"../spi_master_no_write.v ../spi_slave_no_read.v" \ "../spi_master_no_write.v ../spi_slave_no_read.v" \
"-DSPI_MASTER_NO_WRITE -CFLAGS -DSPI_MASTER_NO_WRITE" "-DSPI_MASTER_NO_WRITE -CFLAGS -DSPI_MASTER_NO_WRITE"
) ) || exit 1
( \ ( \
run_test $POL $PHASE \ run_test $POL $PHASE \
@ -60,7 +61,7 @@ for POL in 0 1; do
"../spi_master_ss_no_write.v ../spi_slave_no_read.v" \ "../spi_master_ss_no_write.v ../spi_slave_no_read.v" \
"-DSPI_MASTER_NO_WRITE -CFLAGS -DSPI_MASTER_NO_WRITE "-DSPI_MASTER_NO_WRITE -CFLAGS -DSPI_MASTER_NO_WRITE
-DSPI_MASTER_SS -CFLAGS -DSPI_MASTER_SS" -DSPI_MASTER_SS -CFLAGS -DSPI_MASTER_SS"
) ) || exit 1
( \ ( \
run_test $POL $PHASE \ run_test $POL $PHASE \
@ -68,7 +69,7 @@ for POL in 0 1; do
simtop_no_read_$POL$PHASE 24 \ simtop_no_read_$POL$PHASE 24 \
"../spi_master_no_read.v ../spi_slave_no_write.v" \ "../spi_master_no_read.v ../spi_slave_no_write.v" \
"-DSPI_MASTER_NO_READ -CFLAGS -DSPI_MASTER_NO_READ" "-DSPI_MASTER_NO_READ -CFLAGS -DSPI_MASTER_NO_READ"
) ) || exit 1
( \ ( \
run_test $POL $PHASE \ run_test $POL $PHASE \
@ -77,7 +78,7 @@ for POL in 0 1; do
"../spi_master_ss_no_read.v ../spi_slave_no_write.v" \ "../spi_master_ss_no_read.v ../spi_slave_no_write.v" \
"-DSPI_MASTER_NO_READ -CFLAGS -DSPI_MASTER_NO_READ "-DSPI_MASTER_NO_READ -CFLAGS -DSPI_MASTER_NO_READ
-DSPI_MASTER_SS -CFLAGS -DSPI_MASTER_SS" -DSPI_MASTER_SS -CFLAGS -DSPI_MASTER_SS"
) ) || exit 1
done done
done done

View File

@ -3,6 +3,7 @@
#include "Vsimtop.h" #include "Vsimtop.h"
Vsimtop *sim; Vsimtop *sim;
int return_value = 0;
#ifdef SPI_MASTER_SS #ifdef SPI_MASTER_SS
# define SET_SS(mod, v) # define SET_SS(mod, v)
@ -55,26 +56,25 @@ static void test_cross_transfer(unsigned m2s, unsigned s2m) {
if (sim->err) { if (sim->err) {
printf("slave error\n"); printf("slave error\n");
return_value = 1;
} }
#ifndef SPI_MASTER_NO_WRITE #ifndef SPI_MASTER_NO_WRITE
if (sim->master_to_slave != sim->from_master) { if (sim->master_to_slave != sim->from_master) {
printf("(m2s) %lx != %lx\n", sim->master_to_slave, sim->from_master); printf("(m2s) %lx != %lx\n", sim->master_to_slave, sim->from_master);
return_value = 1;
} }
#endif #endif
#ifndef SPI_MASTER_NO_READ #ifndef SPI_MASTER_NO_READ
if (sim->slave_to_master != sim->from_slave) { if (sim->slave_to_master != sim->from_slave) {
printf("(m2s) %lx != %lx\n", sim->slave_to_master, sim->from_slave); printf("(m2s) %lx != %lx\n", sim->slave_to_master, sim->from_slave);
return_value = 1;
} }
#endif #endif
} }
int main(int argc, char **argv) { int main(int argc, char **argv) {
int r = 0;
(void)r;
Verilated::commandArgs(argc, argv); Verilated::commandArgs(argc, argv);
Verilated::traceEverOn(true); Verilated::traceEverOn(true);
@ -95,5 +95,5 @@ int main(int argc, char **argv) {
sim->final(); sim->final();
delete sim; delete sim;
return r; return return_value;
} }