91 lines
1.5 KiB
C++
91 lines
1.5 KiB
C++
#include <stdio.h>
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#include <verilated.h>
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#include "Vsimtop.h"
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Vsimtop *sim;
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uint32_t main_time = 0;
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double sc_time_stamp() {
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return main_time;
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}
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static void progress() {
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sim->eval();
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main_time++;
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sim->clk = !sim->clk;
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sim->eval();
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main_time++;
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sim->clk = !sim->clk;
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}
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static void progress_n(int f) {
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for (int i = 0; i < f; i++)
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progress();
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}
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static void test_cross_transfer(unsigned m2s, unsigned s2m) {
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#ifndef SPI_MASTER_NO_WRITE
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sim->master_to_slave = m2s;
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#endif
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#ifndef SPI_MASTER_NO_READ
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sim->slave_to_master = s2m;
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#endif
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progress();
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sim->ss = 1;
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sim->rdy = 1;
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sim->activate = 1;
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progress();
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while (!sim->master_finished)
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progress();
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progress_n(5);
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sim->activate = 0;
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sim->ss = 0;
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sim->rdy = 0;
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progress_n(5);
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if (sim->err) {
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printf("slave error\n");
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}
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#ifndef SPI_MASTER_NO_WRITE
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if (sim->master_to_slave != sim->from_master) {
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printf("(m2s) %lx != %lx\n", sim->master_to_slave, sim->from_master);
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}
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#endif
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#ifndef SPI_MASTER_NO_READ
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if (sim->slave_to_master != sim->from_slave) {
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printf("(m2s) %lx != %lx\n", sim->slave_to_master, sim->from_slave);
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}
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#endif
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}
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int main(int argc, char **argv) {
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int r = 0;
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(void)r;
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Verilated::commandArgs(argc, argv);
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Verilated::traceEverOn(true);
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sim = new Vsimtop;
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sim->ss = 0;
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sim->clk = 0;
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sim->activate = 0;
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sim->rdy = 0;
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for (int i = 0; i < 10000; i++) {
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unsigned m2s = rand() & ((1 << WID) - 1);
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unsigned s2m = rand() & ((1 << WID) - 1);
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test_cross_transfer(m2s, s2m);
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}
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sim->final();
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delete sim;
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return r;
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}
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