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authorGravatar Peter McGoron 2022-07-21 03:18:22 -0400
committerGravatar Peter McGoron 2022-07-21 03:18:22 -0400
commit3990a33b6bdf734681ef4ec234102804ddaa1d7f (patch)
treead7571c35c9a8684d5de1e1eb1743338107e7ead
parentmode11 (diff)
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+# Verilog SPI
+
+Verilog SPI master and slave that supports all modes and variable width
+via parameters.
+
+## License
+
+This Program is subject to the terms of the Mozilla Public License,
+v.2.0. A copy of this license may be found in the file `COPYING`. You
+can obtain one at https://mozilla.org/MPL/2.0/.