diff options
| author |  Peter McGoron
| 2022-07-21 02:37:22 -0400 |
|---|---|---|
| committer | Peter McGoron
| 2022-07-21 02:37:22 -0400 |
| commit | 4a683b8f654f3ecb6f2408dad3a9cfa60f3b39e6 (patch) | |
| tree | a6c324803c18ad9a6dbcd65d54b80984d39f58d0 | |
| parent | cleanup, add ready pin to slave (diff) | |
move tests
| -rw-r--r-- | Makefile | 19 | ||||
| -rw-r--r-- | spi_master.v | 5 | ||||
| -rw-r--r-- | spi_slave.v | 5 | ||||
| -rw-r--r-- | tests/mode00.cpp | 3 | ||||
| -rw-r--r-- | tests/mode00.v | 34 | ||||
| -rwxr-xr-x | tests/run.sh | 5 | ||||
| -rw-r--r-- | tests/run_mode.makefile | 25 | ||||
| -rw-r--r-- | tests/spi_write_read.v (renamed from test_spi_write_read_mode0.v) | 23 | ||||
| -rw-r--r-- | tests/write_read.cpp (renamed from test_spi_write_read_mode0.cpp) | 2 |
9 files changed, 91 insertions, 30 deletions
diff --git a/Makefile b/Makefile deleted file mode 100644 index 18f175d..0000000 --- a/Makefile +++ /dev/null @@ -1,19 +0,0 @@ -TESTBENCH_BASE=test_spi_write_read_mode0 -AUXFILES=spi_master.v spi_slave.v -CPP_TESTBENCH=test_spi_write_read_mode0.cpp -WAVEFILE=test_spi_write_read_mode0.vcd - -FILES=${TESTBENCH_BASE}.v ${AUXFILES} ${CPP_TESTBENCH} - -all: obj_dir/V${TESTBENCH_BASE} - ./obj_dir/V${TESTBENCH_BASE} && gtkwave ${WAVEFILE} - -obj_dir/V${TESTBENCH_BASE}.mk: ${FILES} - verilator -Wall -Wno-unused -Wpedantic --trace --cc --exe ${FILES} --top ${TESTBENCH_BASE} -obj_dir/V${TESTBENCH_BASE}: obj_dir/V${TESTBENCH_BASE}.mk - make -C obj_dir -f V${TESTBENCH_BASE}.mk - -run: - ./obj_dir/V${TESTBENCH_CASE} -clean: - $(RM) obj_dir/* diff --git a/spi_master.v b/spi_master.v index 5610119..b8a3439 100644 --- a/spi_master.v +++ b/spi_master.v @@ -1,3 +1,8 @@ +/* (c) Peter McGoron 2022 + * This Source Code Form is subject to the terms of the Mozilla Public + * License, v.2.0. If a copy of the MPL was not distributed with this + * file, You can obtain one at https://mozilla.org/MPL/2.0/. + */ module spi_master #( parameter WID = 24, // Width of bits per transaction. diff --git a/spi_slave.v b/spi_slave.v index 54a5051..a2942de 100644 --- a/spi_slave.v +++ b/spi_slave.v @@ -1,3 +1,8 @@ +/* (c) Peter McGoron 2022 + * This Source Code Form is subject to the terms of the Mozilla Public + * License, v.2.0. If a copy of the MPL was not distributed with this + * file, You can obtain one at https://mozilla.org/MPL/2.0/. + */ module spi_slave #( parameter WID = 24, // Width of bits per transaction. diff --git a/tests/mode00.cpp b/tests/mode00.cpp new file mode 100644 index 0000000..4ba98dd --- /dev/null +++ b/tests/mode00.cpp @@ -0,0 +1,3 @@ +#include "Vmode00.h" +using TopModule = Vmode00; +#include "write_read.cpp" diff --git a/tests/mode00.v b/tests/mode00.v new file mode 100644 index 0000000..2a037cf --- /dev/null +++ b/tests/mode00.v @@ -0,0 +1,34 @@ +/* (c) Peter McGoron 2022 + * This Source Code Form is subject to the terms of the Mozilla Public + * License, v.2.0. If a copy of the MPL was not distributed with this + * file, You can obtain one at https://mozilla.org/MPL/2.0/. + */ + +module mode00 ( + input clk, + input [23:0] data_ctrl, + input activate, + input ss, + input rdy, + output master_finished +); + +spi_write_read +#( + .POLARITY(0), + .PHASE(0) +) base ( + .clk(clk), + .data_ctrl(data_ctrl), + .activate(activate), + .master_finished(master_finished), + .ss(ss), + .rdy(rdy) +); + +initial begin + $dumpfile("mode00.vcd"); + $dumpvars(); +end + +endmodule diff --git a/tests/run.sh b/tests/run.sh new file mode 100755 index 0000000..ea99836 --- /dev/null +++ b/tests/run.sh @@ -0,0 +1,5 @@ +#!/bin/sh + +for i in 00; do + make -f run_mode.makefile MODE="$i" +done diff --git a/tests/run_mode.makefile b/tests/run_mode.makefile new file mode 100644 index 0000000..31b6644 --- /dev/null +++ b/tests/run_mode.makefile @@ -0,0 +1,25 @@ +# (c) Peter McGoron 2022 +# This Source Code Form is subject to the terms of the Mozilla Public +# License, v.2.0. If a copy of the MPL was not distributed with this +# file, You can obtain one at https://mozilla.org/MPL/2.0/. + +TESTBENCH_BASE=mode${MODE} +AUXFILES=../spi_master.v ../spi_slave.v + +CPP_TESTBENCH=${TESTBENCH_BASE}.cpp +WAVEFILE=${TESTBENCH_BASE}.vcd + +FILES=${TESTBENCH_BASE}.v ${AUXFILES} ${CPP_TESTBENCH} + +all: obj_dir/V${TESTBENCH_BASE} + ./obj_dir/V${TESTBENCH_BASE} && gtkwave ${WAVEFILE} + +obj_dir/V${TESTBENCH_BASE}.mk: ${FILES} + verilator -CFLAGS -Wall -Wno-unused -Wpedantic --trace --cc --exe ${FILES} --top ${TESTBENCH_BASE} +obj_dir/V${TESTBENCH_BASE}: obj_dir/V${TESTBENCH_BASE}.mk + make -C obj_dir -f V${TESTBENCH_BASE}.mk + +run: + ./obj_dir/V${TESTBENCH_CASE} +clean: + $(RM) obj_dir/* diff --git a/test_spi_write_read_mode0.v b/tests/spi_write_read.v index 554b92e..8045a1c 100644 --- a/test_spi_write_read_mode0.v +++ b/tests/spi_write_read.v @@ -1,13 +1,21 @@ -module test_spi_write_read_mode0 +/* (c) Peter McGoron 2022 + * This Source Code Form is subject to the terms of the Mozilla Public + * License, v.2.0. If a copy of the MPL was not distributed with this + * file, You can obtain one at https://mozilla.org/MPL/2.0/. + */ + +module spi_write_read +#( + parameter POLARITY = 0, + parameter PHASE = 0 +) ( input clk, input [23:0] data_ctrl, input activate, input ss, input rdy, - output master_finished, - output slave_finished, - output slave_error + output master_finished ); wire miso; @@ -16,6 +24,8 @@ wire sck; wire ss_L = !ss; reg [23:0] from_slave_data; +reg slave_finished; +reg slave_error; spi_master master ( @@ -52,9 +62,4 @@ always @ (posedge clk) begin end end -initial begin - $dumpfile("test_spi_write_read_mode0.vcd"); - $dumpvars(); -end - endmodule diff --git a/test_spi_write_read_mode0.cpp b/tests/write_read.cpp index 631761e..457180a 100644 --- a/test_spi_write_read_mode0.cpp +++ b/tests/write_read.cpp @@ -1,7 +1,5 @@ #include <stdio.h> #include <verilated.h> -#include "Vtest_spi_write_read_mode0.h" -using TopModule = Vtest_spi_write_read_mode0; VerilatedContext *ctx; TopModule *sim; |