start spi master and slave with testbench

1 files changed, 19 insertions, 0 deletions

diff --git a/Makefile b/Makefile
new file mode 100644
index 0000000..450ea9a
--- /dev/null
+++ b/Makefile
@@ -0,0 +1,19 @@
+TESTBENCH_BASE=test_spi_write_read_mode0
+AUXFILES=spi_master.v spi_slave.v
+CPP_TESTBENCH=test_spi_write_read_mode0.cpp
+WAVEFILE=test_spi_write_read_mode0.vcd
+
+FILES=${TESTBENCH_BASE}.v ${AUXFILES} ${CPP_TESTBENCH}
+
+all: obj_dir/V${TESTBENCH_BASE}
+	./obj_dir/V${TESTBENCH_BASE} && gtkwave ${WAVEFILE}
+
+obj_dir/V${TESTBENCH_BASE}.mk: ${FILES}
+	verilator --trace --cc --exe ${FILES} --top ${TESTBENCH_BASE}
+obj_dir/V${TESTBENCH_BASE}: obj_dir/V${TESTBENCH_BASE}.mk
+	make -C obj_dir -f V${TESTBENCH_BASE}.mk
+
+run:
+	./obj_dir/V${TESTBENCH_CASE}
+clean:
+	$(RM) obj_dir/*