diff options
| author |  Peter McGoron
| 2022-10-23 14:03:19 -0400 |
|---|---|---|
| committer | Peter McGoron
| 2022-10-23 14:03:19 -0400 |
| commit | 9bbe1407bae7b4aeca46dbba30814a9962cce670 (patch) | |
| tree | cecd07b7289e84afa02f9b7e146ca0a6103148d9 /spi_master.v | |
| parent | test master with SS (diff) | |
add metastability workaround
Diffstat (limited to 'spi_master.v')
| -rw-r--r-- | spi_master.v | 19 |
1 files changed, 17 insertions, 2 deletions
diff --git a/spi_master.v b/spi_master.v index d6018c0..82e5ee8 100644 --- a/spi_master.v +++ b/spi_master.v @@ -4,6 +4,11 @@ * file, You can obtain one at https://mozilla.org/MPL/2.0/. */ +/* CYCLE_HALF_WAIT should take into account the setup time of the slave + * device, and also master buffering (MISO is one cycle off to stabilize + * the input). + */ + module `ifdef SPI_MASTER_NO_READ spi_master_no_read @@ -14,7 +19,6 @@ spi_master_no_write spi_master `endif `endif - #( parameter WID = 24, // Width of bits per transaction. parameter WID_LEN = 5, // Length in bits required to store WID @@ -39,6 +43,17 @@ spi_master input arm ); +`ifndef SPI_MASTER_NO_READ +/* MISO is almost always an external wire, so buffer it. */ +reg miso_hot = 0; +reg read_miso = 0; + +always @ (posedge clk) begin + read_miso <= miso_hot; + miso_hot <= miso; +end +`endif + parameter WAIT_ON_ARM = 0; parameter ON_CYCLE = 1; parameter CYCLE_WAIT = 2; @@ -71,7 +86,7 @@ endtask task read_data(); `ifndef SPI_MASTER_NO_READ from_slave <= from_slave << 1; - from_slave[0] <= miso; + from_slave[0] <= read_miso; `endif endtask |