add reset pin

1 files changed, 34 insertions, 1 deletions

diff --git a/tests/write_read.cpp b/tests/write_read.cpp
index 74a94ce..be02e57 100644
--- a/tests/write_read.cpp
+++ b/tests/write_read.cpp
@@ -31,6 +31,17 @@ static void progress_n(int f) {
 		progress();
 }
 
+static void test_reset_pin(void) {
+	sim->rst_L = 0;
+	progress();
+	sim->rdy = 1;
+	sim->activate = 1;
+
+	progress_n(200);
+	assert(!sim->master_finished);
+	sim->rst_L = 1;
+}
+
 static void test_cross_transfer(unsigned m2s, unsigned s2m) {
 #ifndef SPI_MASTER_NO_WRITE
 	sim->master_to_slave = m2s;
@@ -39,6 +50,7 @@ static void test_cross_transfer(unsigned m2s, unsigned s2m) {
 	sim->slave_to_master = s2m;
 #endif
 
+	sim->rst_L = 1;
 	progress();
 	SET_SS(sim, 1);
 	sim->rdy = 1;
@@ -74,6 +86,19 @@ static void test_cross_transfer(unsigned m2s, unsigned s2m) {
 #endif
 }
 
+static void test_interrupted(unsigned m2s, unsigned s2m) {
+	sim->rst_L = 1;
+	progress();
+
+	sim->rdy = 1;
+	sim->activate = 1;
+	progress_n(6);
+	sim->rst_L = 0;
+	progress_n(100);
+	sim->rst_L = 1;
+	test_cross_transfer(m2s, s2m);
+}
+
 int main(int argc, char **argv) {
 	Verilated::commandArgs(argc, argv);
 	Verilated::traceEverOn(true);
@@ -84,13 +109,21 @@ int main(int argc, char **argv) {
 	sim->activate = 0;
 	sim->rdy = 0;
 
+	test_reset_pin();
 	test_cross_transfer(0b101010101010101010101010, 0b010101010101010101010101);
 	test_cross_transfer(0b110011001100110011001100, 0b001100110011001100110011);
+	test_reset_pin();
 
 	for (int i = 0; i < 10000; i++) {
 		unsigned m2s = rand() & ((1 << WID) - 1);
 		unsigned s2m = rand() & ((1 << WID) - 1);
-		test_cross_transfer(m2s, s2m);
+		if (i % (((rand() + 1) % 32) + 1) == 0)
+			test_interrupted(m2s, s2m);
+		else
+			test_cross_transfer(m2s, s2m);
+		if (i % (((rand() + 1) % 64) + 1) == 0)
+			test_reset_pin();
+
 	}
 
 	sim->final();