67 lines
1.6 KiB
Coq
67 lines
1.6 KiB
Coq
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`timescale 1ns / 1ps
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module toplevel(
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input wire clk100,
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input wire cpu_reset,//active low
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input wire tck,
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input wire tms,
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input wire tdi,
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input wire trst,//ignored
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output reg tdo,
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input wire serial_rx,
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output wire serial_tx,
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input wire user_sw0,
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input wire user_sw1,
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input wire user_sw2,
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input wire user_sw3,
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input wire user_btn0,
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input wire user_btn1,
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input wire user_btn2,
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input wire user_btn3,
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output wire user_led0,
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output wire user_led1,
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output wire user_led2,
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output wire user_led3
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);
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wire [31:0] io_gpioA_read;
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wire [31:0] io_gpioA_write;
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wire [31:0] io_gpioA_writeEnable;
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wire io_asyncReset = ~cpu_reset;
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assign {user_led3,user_led2,user_led1,user_led0} = io_gpioA_write[3 : 0];
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assign io_gpioA_read[3:0] = {user_sw3,user_sw2,user_sw1,user_sw0};
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assign io_gpioA_read[7:4] = {user_btn3,user_btn2,user_btn1,user_btn0};
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assign io_gpioA_read[11:8] = {tck,tms,tdi,trst};
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reg tesic_tck,tesic_tms,tesic_tdi;
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wire tesic_tdo;
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reg soc_tck,soc_tms,soc_tdi;
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wire soc_tdo;
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always @(*) begin
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{soc_tck, soc_tms, soc_tdi } = {tck,tms,tdi};
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tdo = soc_tdo;
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end
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Murax core (
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.io_asyncReset(io_asyncReset),
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.io_mainClk (clk100 ),
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.io_jtag_tck(soc_tck),
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.io_jtag_tdi(soc_tdi),
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.io_jtag_tdo(soc_tdo),
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.io_jtag_tms(soc_tms),
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.io_gpioA_read (io_gpioA_read),
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.io_gpioA_write (io_gpioA_write),
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.io_gpioA_writeEnable(io_gpioA_writeEnable),
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.io_uart_txd(serial_tx),
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.io_uart_rxd(serial_rx)
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);
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endmodule
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