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VexRiscv
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debug unavailable is now BufferCC

This commit is contained in:
Charles Papon 2023-03-15 09:50:09 +08:00
parent 876222d886
commit 13061b8b2e
1 changed files with 1 additions and 1 deletions
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2
src/main/scala/vexriscv/plugin/CsrPlugin.scala
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@ -709,7 +709,7 @@ class CsrPlugin(val config: CsrPluginConfig) extends Plugin[VexRiscv] with Excep
bus.running := running bus.running := running
bus.halted := !running bus.halted := !running
bus.unavailable := RegNext(ClockDomain.current.isResetActive) bus.unavailable := BufferCC(ClockDomain.current.isResetActive)
when(debugMode){ when(debugMode){
inhibateInterrupts() inhibateInterrupts()
} }