Murax on arty_a7: fix RAMB type on soc_mmi.tcl
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@ -21,7 +21,7 @@ proc swap_bits { bit } {
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# open_run impl_1
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# Find all the RAMs, place in a list
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set rams [get_cells -hier -regexp {.*core/system_ram/.*} -filter {REF_NAME =~ RAMB36E1}]
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set rams [get_cells -hier -regexp {.*core/system_ram/.*} -filter {REF_NAME == RAMB36E1 || REF_NAME == RAMB18E1}]
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puts "[llength $rams] RAMs in total"
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foreach m $rams {puts $m}
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@ -89,7 +89,7 @@ set i 0
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foreach ram $rams {
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# Get the RAM location
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set loc_val [get_property LOC [get_cells $ram]]
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regexp -- {(RAMB36_)([0-9XY]+)} $loc_val full ram_name loc_xy
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regexp {(RAMB.+_)([0-9XY]+)} $loc_val full ram_name loc_xy
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set memi [dict create ram $ram loc $loc_xy]
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