Hardware
/
VexRiscv
mirror of https://github.com/SpinalHDL/VexRiscv.git
1
0
Fork 0
Code Issues Packages Projects Releases Wiki Activity

Ignore vim backup files.

This commit is contained in:
Tom Verbeure 2019-03-23 22:34:22 +00:00
parent 95c3e436dc
commit 1afad4f240
1 changed files with 2 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
.gitignore vendored
View File

@ -1,6 +1,7 @@
*.class
*.log
*.bak
.*.swp
# sbt specific
.cache/
@ -46,4 +47,4 @@ obj_dir
simWorkspace/
tmp/
/archive.tar.gz
*.out32
*.out32