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VexRiscv
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Fix exception handeling

This commit is contained in:
Charles Papon 2019-06-09 23:40:37 +02:00
parent 5243e46ffb
commit 24e1e3018c
3 changed files with 2 additions and 3 deletions
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2
src/main/scala/vexriscv/plugin/CsrPlugin.scala
View File

@ -716,7 +716,7 @@ class CsrPlugin(val config: CsrPluginConfig) extends Plugin[VexRiscv] with Excep
} }
} }
when(exceptionValidsRegs.orR){ when(exceptionValids.orR){
fetcher.haltIt() fetcher.haltIt()
} }

1
src/main/scala/vexriscv/plugin/IBusCachedPlugin.scala
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@ -233,7 +233,6 @@ class IBusCachedPlugin(resetVector : BigInt = 0x80000000l,
redoFetch clearWhen(!iBusRsp.readyForError) redoFetch clearWhen(!iBusRsp.readyForError)
cache.io.cpu.fill.valid clearWhen(!iBusRsp.readyForError) cache.io.cpu.fill.valid clearWhen(!iBusRsp.readyForError)
if (catchSomething) decodeExceptionPort.valid clearWhen(fetcherHalt)
redoBranch.valid := redoFetch redoBranch.valid := redoFetch
redoBranch.payload := (if (decodePcGen) decode.input(PC) else cacheRsp.pc) redoBranch.payload := (if (decodePcGen) decode.input(PC) else cacheRsp.pc)

2
src/main/scala/vexriscv/plugin/IBusSimplePlugin.scala
View File

@ -372,7 +372,7 @@ class IBusSimplePlugin(resetVector : BigInt,
exceptionDetected := True exceptionDetected := True
} }
} }
decodeExceptionPort.valid := exceptionDetected && iBusRsp.readyForError && !fetcherHalt decodeExceptionPort.valid := exceptionDetected && iBusRsp.readyForError
} }
} }
} }