MMU pass simple regression !

src/main/scala/SpinalRiscv/TopLevel.scala

@@ -256,7 +256,7 @@ object TopLevel {
         new MemoryTranslatorPlugin(
           tlbSize = 32,
           exceptionCode = 13,
-          mmuRange = !_(31)
+          mmuRange = _(31 downto 28) === 0xC
         ),
         new MachineCsr(csrConfigAll),
         new DecoderSimplePlugin(

src/test/cpp/testA/main.cpp

@@ -194,7 +194,10 @@ public:
 
 
 	virtual void iBusAccess(uint32_t addr, uint32_t *data, bool *error) {
-		if(addr % 4 != 0) cout << "Warning, unaligned IBusAccess : " << addr << endl;
+		if(addr % 4 != 0) {
+			cout << "Warning, unaligned IBusAccess : " << addr << endl;
+			fail();
+		}
 		*data =     (  (mem[addr + 0] << 0)
 					 | (mem[addr + 1] << 8)
 					 | (mem[addr + 2] << 16)
@@ -827,6 +830,11 @@ int main(int argc, char **argv, char **env) {
 		8,6,9,6,10,4,11,4,    12,13,0,   14,2,     15,5,16,5,17,1 };
 		redo(REDO,TestX28("machineCsr",machineCsrRef, sizeof(machineCsrRef)/4).run(4e3);)
 		#endif
+		#ifdef MMU
+		uint32_t mmuRef[] = {1,2,3, 0x11111111, 0x11111111, 0x11111111, 0x22222222, 0x22222222, 0x22222222, 4, 0x11111111, 0x33333333, 0x33333333, 5,
+			13, 0xC4000000,0x33333333, 6};
+		redo(REDO,TestX28("mmu",mmuRef, sizeof(mmuRef)/4).run(4e3);)
+		#endif
 		#endif
 
 

src/test/cpp/testA/makefile

@@ -1,11 +1,12 @@
 IBUS=IBUS_CACHED
 DBUS=DBUS_CACHED
-TRACE=no
+TRACE=yes
 TRACE_START=0
 CSR=no
+MMU=yes
 DHRYSTONE=yes
 FREE_RTOS=no
-REDO=10
+REDO=1
 REF=no
 TRACE_WITH_TIME=no
 REF_TIME=no
@@ -34,6 +35,10 @@ ifeq ($(REF_TIME),yes)
 	ADDCFLAGS += -CFLAGS -DREF_TIME
 endif
 
+ifeq ($(MMU),yes)
+	ADDCFLAGS += -CFLAGS -DMMU
+endif
+
 ifeq ($(REF),yes)
 	ADDCFLAGS += -CFLAGS -DREF
 endif