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Fix #191 (data cache toAxi bridge)

This commit is contained in:
Dolu1990 2021-07-20 11:20:53 +02:00
parent 66bcd7fca7
commit 3028c19389
1 changed files with 1 additions and 1 deletions
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2
src/main/scala/vexriscv/ip/DataCache.scala
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@ -287,7 +287,7 @@ case class DataCacheMemBus(p : DataCacheConfig) extends Bundle with IMasterSlave
axi.sharedCmd.write := cmdStage.wr axi.sharedCmd.write := cmdStage.wr
axi.sharedCmd.prot := "010" axi.sharedCmd.prot := "010"
axi.sharedCmd.cache := "1111" axi.sharedCmd.cache := "1111"
axi.sharedCmd.size := cmd.size.max(log2Up(p.memDataBytes)) axi.sharedCmd.size := log2Up(p.memDataBytes)
axi.sharedCmd.addr := cmdStage.address axi.sharedCmd.addr := cmdStage.address
axi.sharedCmd.len := cmd.beatCountMinusOne.resized axi.sharedCmd.len := cmd.beatCountMinusOne.resized