Add mmu regresion blank project
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Dolu1990
parent
ccc3b63d7c
commit
3a38fe4130
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@ -0,0 +1,73 @@
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PROJ_NAME=mmu
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RISCV_PATH?=/opt/riscv/
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CFLAGS += -march=rv32i -mabi=ilp32
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RISCV_NAME = riscv64-unknown-elf
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RISCV_OBJCOPY = $(RISCV_PATH)/bin/$(RISCV_NAME)-objcopy
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RISCV_OBJDUMP = $(RISCV_PATH)/bin/$(RISCV_NAME)-objdump
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RISCV_CLIB=$(RISCV_PATH)$(RISCV_NAME)/lib/
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RISCV_CC=$(RISCV_PATH)/bin/$(RISCV_NAME)-gcc
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LDSCRIPT=src/ld
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SRCS = $(wildcard src/*.c) \
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$(wildcard src/*.cpp) \
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$(wildcard src/*.S)
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CFLAGS += -static
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LDFLAGS += -e_start -T $(LDSCRIPT) -nostartfiles -Wl,-Map,$(OBJDIR)/$(PROJ_NAME).map -Wl,--print-memory-usage
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OBJDIR = build
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OBJS := $(SRCS)
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OBJS := $(OBJS:.c=.o)
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OBJS := $(OBJS:.cpp=.o)
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OBJS := $(OBJS:.S=.o)
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OBJS := $(addprefix $(OBJDIR)/,$(OBJS))
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all: $(OBJDIR)/$(PROJ_NAME).elf $(OBJDIR)/$(PROJ_NAME).hex $(OBJDIR)/$(PROJ_NAME).asm $(OBJDIR)/$(PROJ_NAME).v
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@echo "done"
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$(OBJDIR)/%.elf: $(OBJS) | $(OBJDIR)
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$(RISCV_CC) $(CFLAGS) -o $@ $^ $(LDFLAGS) $(LIBS)
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%.hex: %.elf
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$(RISCV_OBJCOPY) -O ihex $^ $@
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%.bin: %.elf
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$(RISCV_OBJCOPY) -O binary $^ $@
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%.v: %.elf
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$(RISCV_OBJCOPY) -O verilog $^ $@
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%.asm: %.elf
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$(RISCV_OBJDUMP) -S -d $^ > $@
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$(OBJDIR)/%.o: %.c
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mkdir -p $(dir $@)
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$(RISCV_CC) -c $(CFLAGS) $(INC) -o $@ $^
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$(OBJDIR)/%.o: %.cpp
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mkdir -p $(dir $@)
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$(RISCV_CC) -c $(CFLAGS) $(INC) -o $@ $^
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$(OBJDIR)/%.o: %.S
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mkdir -p $(dir $@)
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$(RISCV_CC) -c $(CFLAGS) -o $@ $^ -D__ASSEMBLY__=1
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$(OBJDIR):
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mkdir -p $@
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clean:
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rm -f $(OBJDIR)/$(PROJ_NAME).elf
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rm -f $(OBJDIR)/$(PROJ_NAME).hex
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rm -f $(OBJDIR)/$(PROJ_NAME).map
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rm -f $(OBJDIR)/$(PROJ_NAME).v
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rm -f $(OBJDIR)/$(PROJ_NAME).asm
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find $(OBJDIR) -type f -name '*.o' -print0 | xargs -0 -r rm
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.SECONDARY: $(OBJS)
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@ -0,0 +1,43 @@
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build/mmu.elf: file format elf32-littleriscv
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Disassembly of section .crt_section:
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80000000 <trap_entry-0x20>:
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80000000: 0280006f j 80000028 <_start>
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80000004: 00000013 nop
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80000008: 00000013 nop
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8000000c: 00000013 nop
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80000010: 00000013 nop
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80000014: 00000013 nop
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80000018: 00000013 nop
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8000001c: 00000013 nop
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80000020 <trap_entry>:
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80000020: 0200006f j 80000040 <fail>
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80000024: 30200073 mret
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80000028 <_start>:
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80000028: 00000097 auipc ra,0x0
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8000002c: 01808093 addi ra,ra,24 # 80000040 <fail>
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80000030: 30509073 csrw mtvec,ra
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80000034: 10509073 csrw stvec,ra
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80000038: 00100e13 li t3,1
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8000003c: 0100006f j 8000004c <pass>
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80000040 <fail>:
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80000040: f0100137 lui sp,0xf0100
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80000044: f2410113 addi sp,sp,-220 # f00fff24 <pass+0x700ffed8>
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80000048: 01c12023 sw t3,0(sp)
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8000004c <pass>:
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8000004c: f0100137 lui sp,0xf0100
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80000050: f2010113 addi sp,sp,-224 # f00fff20 <pass+0x700ffed4>
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80000054: 00012023 sw zero,0(sp)
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80000058: 00000013 nop
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8000005c: 00000013 nop
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80000060: 00000013 nop
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80000064: 00000013 nop
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80000068: 00000013 nop
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8000006c: 00000013 nop
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@ -0,0 +1,10 @@
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:0200000480007A
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:100000006F008002130000001300000013000000C6
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:100010001300000013000000130000001300000094
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:100020006F00000273002030970000009380800171
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:100030007390503073905010130E10006F00000139
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:10004000370110F0130141F22320C101370110F0F4
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:10005000130101F22320010013000000130000002F
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:100060001300000013000000130000001300000044
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:04000005800000284F
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:00000001FF
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@ -0,0 +1,3 @@
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PROJ_NAME=mmu
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include ../common/asm.mk
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@ -0,0 +1,46 @@
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.globl _start
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j _start
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nop
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nop
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nop
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nop
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nop
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nop
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nop
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.global trap_entry
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trap_entry:
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j fail
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mret
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_start:
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la x1, fail
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csrw mtvec, x1
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csrw stvec, x1
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//Test 1 SC on unreserved area should fail and not write memory
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li x28, 1
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j pass
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fail: //x28 => error code
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li x2, 0xF00FFF24
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sw x28, 0(x2)
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pass:
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li x2, 0xF00FFF20
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sw x0, 0(x2)
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nop
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nop
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nop
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nop
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nop
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nop
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@ -0,0 +1,16 @@
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OUTPUT_ARCH( "riscv" )
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MEMORY {
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onChipRam (W!RX)/*(RX)*/ : ORIGIN = 0x80000000, LENGTH = 8K
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}
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SECTIONS
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{
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.crt_section :
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{
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. = ALIGN(4);
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*crt.o(.text)
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} > onChipRam
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}
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