Dhrystone regression now also run coremark

This commit is contained in:
Charles Papon 2019-04-23 21:54:42 +02:00
parent c6dbaa52f6
commit 4078f84e8f
1 changed files with 22 additions and 10 deletions

View File

@ -33,7 +33,11 @@ class DhrystoneBench extends FunSuite{
assert(!str.contains("FAIL"))
val intFind = "(\\d+\\.?)+".r
val dmips = intFind.findFirstIn("DMIPS per Mhz\\: (\\d+.?)+".r.findAllIn(str).toList.last).get.toDouble
report ++= name + " -> " + dmips + "\n"
val coremarkTicks = intFind.findFirstIn("Total ticks \\: (\\d+.?)+".r.findAllIn(str).toList.last).get.toDouble
val coremarkIterations = intFind.findFirstIn("Iterations \\: (\\d+.?)+".r.findAllIn(str).toList.last).get.toDouble
val coremarkHzs = intFind.findFirstIn("DCLOCKS_PER_SEC=(\\d+.?)+".r.findAllIn(str).toList.last).get.toDouble
val coremarkPerMhz =1e6*coremarkIterations/coremarkTicks
report ++= s"$name -> $dmips DMIPS/Mhz $coremarkPerMhz Coremark/Mhz\n"
}
}
@ -41,60 +45,68 @@ class DhrystoneBench extends FunSuite{
getDmips(
name = "GenSmallestNoCsr",
gen = GenSmallestNoCsr.main(null),
testCmd = "make clean run REDO=10 IBUS=SIMPLE DBUS=SIMPLE CSR=no MMU=no DEBUG_PLUGIN=no MUL=no DIV=no"
testCmd = "make clean run REDO=10 IBUS=SIMPLE DBUS=SIMPLE CSR=no MMU=no DEBUG_PLUGIN=no MUL=no DIV=no COREMARK=yes"
)
getDmips(
name = "GenSmallest",
gen = GenSmallest.main(null),
testCmd = "make clean run REDO=10 IBUS=SIMPLE DBUS=SIMPLE CSR=no MMU=no DEBUG_PLUGIN=no MUL=no DIV=no"
testCmd = "make clean run REDO=10 IBUS=SIMPLE DBUS=SIMPLE CSR=no MMU=no DEBUG_PLUGIN=no MUL=no DIV=no COREMARK=yes"
)
getDmips(
name = "GenSmallAndProductive",
gen = GenSmallAndProductive.main(null),
testCmd = "make clean run REDO=10 IBUS=SIMPLE DBUS=SIMPLE CSR=no MMU=no DEBUG_PLUGIN=no MUL=no DIV=no"
testCmd = "make clean run REDO=10 IBUS=SIMPLE DBUS=SIMPLE CSR=no MMU=no DEBUG_PLUGIN=no MUL=no DIV=no COREMARK=yes"
)
getDmips(
name = "GenSmallAndProductiveWithICache",
gen = GenSmallAndProductiveICache.main(null),
testCmd = "make clean run REDO=10 IBUS=CACHED DBUS=SIMPLE CSR=no MMU=no DEBUG_PLUGIN=no MUL=no DIV=no"
testCmd = "make clean run REDO=10 IBUS=CACHED DBUS=SIMPLE CSR=no MMU=no DEBUG_PLUGIN=no MUL=no DIV=no COREMARK=yes"
)
getDmips(
name = "GenFullNoMmuNoCache",
gen = GenFullNoMmuNoCache.main(null),
testCmd = "make clean run REDO=10 IBUS=SIMPLE DBUS=SIMPLE CSR=no MMU=no"
testCmd = "make clean run REDO=10 IBUS=SIMPLE DBUS=SIMPLE CSR=no MMU=no COREMARK=yes"
)
getDmips(
name = "GenNoCacheNoMmuMaxPerf",
gen = GenNoCacheNoMmuMaxPerf.main(null),
testCmd = "make clean run REDO=10 MMU=no CSR=no DBUS=SIMPLE IBUS=SIMPLE"
testCmd = "make clean run REDO=10 MMU=no CSR=no DBUS=SIMPLE IBUS=SIMPLE COREMARK=yes"
)
getDmips(
name = "GenFullNoMmuMaxPerf",
gen = GenFullNoMmuMaxPerf.main(null),
testCmd = "make clean run REDO=10 MMU=no CSR=no"
testCmd = "make clean run REDO=10 MMU=no CSR=no COREMARK=yes"
)
getDmips(
name = "GenFullNoMmu",
gen = GenFullNoMmu.main(null),
testCmd = "make clean run REDO=10 MMU=no CSR=no"
testCmd = "make clean run REDO=10 MMU=no CSR=no COREMARK=yes"
)
getDmips(
name = "GenFull",
gen = GenFull.main(null),
testCmd = "make clean run REDO=10 CSR=no MMU=no"
testCmd = "make clean run REDO=10 CSR=no MMU=no COREMARK=yes"
)
getDmips(
name = "GenLinuxBalenced",
gen = LinuxGen.main(Array.fill[String](0)("")),
testCmd = "make clean run IBUS=CACHED DBUS=CACHED DEBUG_PLUGIN=STD DHRYSTONE=yes SUPERVISOR=yes MMU=no CSR=yes CSR_SKIP_TEST=yes DEBUG_PLUGIN=no COMPRESSED=no MUL=yes DIV=yes LRSC=yes AMO=yes REDO=10 TRACE=no COREMARK=yes LINUX_REGRESSION=no"
)
test("final_report") {
println(report)
}