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CsrPlugin : Now wait that the whole pipeline (including writeback) is empty before executing interruptions. This make the separation between context switching clear and avoid on atomic instructions failure

This commit is contained in:
Dolu1990 2018-01-04 17:37:23 +01:00
parent 2b7465e5df
commit 43d3ffd685
9 changed files with 432 additions and 270 deletions
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6
src/main/scala/vexriscv/plugin/CsrPlugin.scala
View File

@ -335,7 +335,7 @@ class CsrPlugin(config : CsrPluginConfig) extends Plugin[VexRiscv] with Exceptio
val pipelineLiberator = new Area{ val pipelineLiberator = new Area{
val enable = False.noBackendCombMerge //Verilator Perf val enable = False.noBackendCombMerge //Verilator Perf
prefetch.arbitration.haltByOther setWhen(enable) prefetch.arbitration.haltByOther setWhen(enable)
val done = ! List(fetch, decode, execute, memory).map(_.arbitration.isValid).orR val done = ! List(fetch, decode, execute, memory, writeBack).map(_.arbitration.isValid).orR
} }
@ -395,7 +395,7 @@ class CsrPlugin(config : CsrPluginConfig) extends Plugin[VexRiscv] with Exceptio
val interrupt = ((mip.MSIP && mie.MSIE) || (mip.MEIP && mie.MEIE) || (mip.MTIP && mie.MTIE)) && mstatus.MIE && allowInterrupts val interrupt = ((mip.MSIP && mie.MSIE) || (mip.MEIP && mie.MEIE) || (mip.MTIP && mie.MTIE)) && mstatus.MIE && allowInterrupts
val exception = if(exceptionPortCtrl != null) exceptionPortCtrl.exceptionValids.last && allowException else False val exception = if(exceptionPortCtrl != null) exceptionPortCtrl.exceptionValids.last && allowException else False
val writeBackWfi = if(wfiGen) writeBack.arbitration.isValid && writeBack.input(ENV_CTRL) === EnvCtrlEnum.WFI else False val writeBackWasWfi = if(wfiGen) RegNext(writeBack.arbitration.isFiring && writeBack.input(ENV_CTRL) === EnvCtrlEnum.WFI) init(False) else False
//Interrupt/Exception entry logic //Interrupt/Exception entry logic
pipelineLiberator.enable setWhen(interrupt) pipelineLiberator.enable setWhen(interrupt)
@ -407,7 +407,7 @@ class CsrPlugin(config : CsrPluginConfig) extends Plugin[VexRiscv] with Exceptio
mstatus.MPP := privilege mstatus.MPP := privilege
mepc := exception mux( mepc := exception mux(
True -> writeBack.input(PC), True -> writeBack.input(PC),
False -> (writeBackWfi ? (writeBack.input(PC) + 4) | prefetch.input(PC_CALC_WITHOUT_JUMP)) //TODO ? WFI could emulate J PC + 4 False -> (writeBackWasWfi ? writeBack.input(PC) | prefetch.input(PC_CALC_WITHOUT_JUMP))
) )
mcause.interrupt := interrupt mcause.interrupt := interrupt

394
src/test/cpp/custom/atomic/build/atomic.asm
View File

@ -5,7 +5,7 @@ build/atomic.elf: file format elf32-littleriscv
Disassembly of section .crt_section: Disassembly of section .crt_section:
00000000 <trap_entry-0x20>: 00000000 <trap_entry-0x20>:
0: 0300006f j 30 <_start> 0: 04c0006f j 4c <_start>
4: 00000013 nop 4: 00000013 nop
8: 00000013 nop 8: 00000013 nop
c: 00000013 nop c: 00000013 nop
@ -15,174 +15,232 @@ Disassembly of section .crt_section:
1c: 00000013 nop 1c: 00000013 nop
00000020 <trap_entry>: 00000020 <trap_entry>:
20: 34102ef3 csrr t4,mepc 20: 30002ef3 csrr t4,mstatus
24: 004e8e93 addi t4,t4,4 24: 080efe93 andi t4,t4,128
28: 341e9073 csrw mepc,t4 28: 000e8a63 beqz t4,3c <notExternalInterrupt>
2c: 30200073 mret 2c: 00002eb7 lui t4,0x2
30: 800e8e93 addi t4,t4,-2048 # 1800 <pass+0x1498>
34: 300e9073 csrw mstatus,t4
38: 30200073 mret
00000030 <_start>: 0000003c <notExternalInterrupt>:
30: 00100e13 li t3,1 3c: 34102ef3 csrr t4,mepc
34: 10000537 lui a0,0x10000 40: 004e8e93 addi t4,t4,4
38: 06400593 li a1,100 44: 341e9073 csrw mepc,t4
3c: 06500613 li a2,101 48: 30200073 mret
40: 06600693 li a3,102
44: 00d52023 sw a3,0(a0) # 10000000 <pass+0xffffd78>
48: 18b5262f sc.w a2,a1,(a0)
4c: 00100713 li a4,1
50: 22e61663 bne a2,a4,27c <fail>
54: 00052703 lw a4,0(a0)
58: 22e69263 bne a3,a4,27c <fail>
5c: 00200e13 li t3,2
60: 10000537 lui a0,0x10000
64: 00450513 addi a0,a0,4 # 10000004 <pass+0xffffd7c>
68: 06700593 li a1,103
6c: 06800613 li a2,104
70: 06900693 li a3,105
74: 00d52023 sw a3,0(a0)
78: 18b5262f sc.w a2,a1,(a0)
7c: 00100713 li a4,1
80: 1ee61e63 bne a2,a4,27c <fail>
84: 00052703 lw a4,0(a0)
88: 1ee69a63 bne a3,a4,27c <fail>
8c: 00300e13 li t3,3
90: 10000537 lui a0,0x10000
94: 00450513 addi a0,a0,4 # 10000004 <pass+0xffffd7c>
98: 06700593 li a1,103
9c: 06800613 li a2,104
a0: 06900693 li a3,105
a4: 18b5262f sc.w a2,a1,(a0)
a8: 00100713 li a4,1
ac: 1ce61863 bne a2,a4,27c <fail>
b0: 00052703 lw a4,0(a0)
b4: 1ce69463 bne a3,a4,27c <fail>
b8: 00400e13 li t3,4
bc: 10000537 lui a0,0x10000
c0: 00850513 addi a0,a0,8 # 10000008 <pass+0xffffd80>
c4: 06a00593 li a1,106
c8: 06b00613 li a2,107
cc: 06c00693 li a3,108
d0: 00d52023 sw a3,0(a0)
d4: 100527af lr.w a5,(a0)
d8: 18b5262f sc.w a2,a1,(a0)
dc: 1ad79063 bne a5,a3,27c <fail>
e0: 18061e63 bnez a2,27c <fail>
e4: 00052703 lw a4,0(a0)
e8: 18e59a63 bne a1,a4,27c <fail>
ec: 00500e13 li t3,5
f0: 10000537 lui a0,0x10000
f4: 00850513 addi a0,a0,8 # 10000008 <pass+0xffffd80>
f8: 06d00593 li a1,109
fc: 06e00613 li a2,110
100: 06f00693 li a3,111
104: 00d52023 sw a3,0(a0)
108: 18b5262f sc.w a2,a1,(a0)
10c: 16061863 bnez a2,27c <fail>
110: 00052703 lw a4,0(a0)
114: 16e59463 bne a1,a4,27c <fail>
118: 00600e13 li t3,6
11c: 10000537 lui a0,0x10000
120: 00c50513 addi a0,a0,12 # 1000000c <pass+0xffffd84>
124: 07000593 li a1,112
128: 07100613 li a2,113
12c: 07200693 li a3,114
130: 10000437 lui s0,0x10000
134: 01040413 addi s0,s0,16 # 10000010 <pass+0xffffd88>
138: 07300493 li s1,115
13c: 07400913 li s2,116
140: 07500993 li s3,117
144: 00d52023 sw a3,0(a0)
148: 01342023 sw s3,0(s0)
14c: 100527af lr.w a5,(a0)
150: 10042aaf lr.w s5,(s0)
154: 18b5262f sc.w a2,a1,(a0)
158: 1894292f sc.w s2,s1,(s0)
15c: 12d79063 bne a5,a3,27c <fail>
160: 10061e63 bnez a2,27c <fail>
164: 00052703 lw a4,0(a0)
168: 10e59a63 bne a1,a4,27c <fail>
16c: 113a9863 bne s5,s3,27c <fail>
170: 10091663 bnez s2,27c <fail>
174: 00042a03 lw s4,0(s0)
178: 11449263 bne s1,s4,27c <fail>
17c: 00700e13 li t3,7
180: 10000537 lui a0,0x10000
184: 01450513 addi a0,a0,20 # 10000014 <pass+0xffffd8c>
188: 07800593 li a1,120
18c: 07900613 li a2,121
190: 07a00693 li a3,122
194: 01000e93 li t4,16
00000198 <test7>: 0000004c <_start>:
198: 00d52023 sw a3,0(a0) 4c: 00100e13 li t3,1
19c: 100527af lr.w a5,(a0) 50: 10000537 lui a0,0x10000
1a0: 18b5262f sc.w a2,a1,(a0) 54: 06400593 li a1,100
1a4: 0cd79c63 bne a5,a3,27c <fail> 58: 06500613 li a2,101
1a8: 0c061a63 bnez a2,27c <fail> 5c: 06600693 li a3,102
1ac: 00052703 lw a4,0(a0) 60: 00d52023 sw a3,0(a0) # 10000000 <pass+0xffffc98>
1b0: 0ce59663 bne a1,a4,27c <fail> 64: 18b5262f sc.w a2,a1,(a0)
1b4: fffe8e93 addi t4,t4,-1 68: 00100713 li a4,1
1b8: 00450513 addi a0,a0,4 6c: 2ee61863 bne a2,a4,35c <fail>
1bc: 00358593 addi a1,a1,3 70: 00052703 lw a4,0(a0)
1c0: 00360613 addi a2,a2,3 74: 2ee69463 bne a3,a4,35c <fail>
1c4: 00368693 addi a3,a3,3 78: 00200e13 li t3,2
1c8: fc0e98e3 bnez t4,198 <test7> 7c: 10000537 lui a0,0x10000
1cc: 00800e13 li t3,8 80: 00450513 addi a0,a0,4 # 10000004 <pass+0xffffc9c>
1d0: 10000537 lui a0,0x10000 84: 06700593 li a1,103
1d4: 01850513 addi a0,a0,24 # 10000018 <pass+0xffffd90> 88: 06800613 li a2,104
1d8: 07800593 li a1,120 8c: 06900693 li a3,105
1dc: 07900613 li a2,121 90: 00d52023 sw a3,0(a0)
1e0: 07a00693 li a3,122 94: 18b5262f sc.w a2,a1,(a0)
1e4: 00052783 lw a5,0(a0) 98: 00100713 li a4,1
1e8: 18b5262f sc.w a2,a1,(a0) 9c: 2ce61063 bne a2,a4,35c <fail>
1ec: 00100713 li a4,1 a0: 00052703 lw a4,0(a0)
1f0: 08e61663 bne a2,a4,27c <fail> a4: 2ae69c63 bne a3,a4,35c <fail>
1f4: 00052703 lw a4,0(a0) a8: 00300e13 li t3,3
1f8: 08e79263 bne a5,a4,27c <fail> ac: 10000537 lui a0,0x10000
1fc: 00900e13 li t3,9 b0: 00450513 addi a0,a0,4 # 10000004 <pass+0xffffc9c>
200: 10000537 lui a0,0x10000 b4: 06700593 li a1,103
204: 10050513 addi a0,a0,256 # 10000100 <pass+0xffffe78> b8: 06800613 li a2,104
208: 07b00593 li a1,123 bc: 06900693 li a3,105
20c: 07c00613 li a2,124 c0: 18b5262f sc.w a2,a1,(a0)
210: 07d00693 li a3,125 c4: 00100713 li a4,1
214: 00d52023 sw a3,0(a0) c8: 28e61a63 bne a2,a4,35c <fail>
218: 100527af lr.w a5,(a0) cc: 00052703 lw a4,0(a0)
21c: 00000073 ecall d0: 28e69663 bne a3,a4,35c <fail>
220: 18b5262f sc.w a2,a1,(a0) d4: 00400e13 li t3,4
224: 00100713 li a4,1 d8: 10000537 lui a0,0x10000
228: 04e61a63 bne a2,a4,27c <fail> dc: 00850513 addi a0,a0,8 # 10000008 <pass+0xffffca0>
22c: 00052703 lw a4,0(a0) e0: 06a00593 li a1,106
230: 04e69663 bne a3,a4,27c <fail> e4: 06b00613 li a2,107
234: 00900e13 li t3,9 e8: 06c00693 li a3,108
238: 10000537 lui a0,0x10000 ec: 00d52023 sw a3,0(a0)
23c: 20050513 addi a0,a0,512 # 10000200 <pass+0xfffff78> f0: 100527af lr.w a5,(a0)
240: 10000837 lui a6,0x10000 f4: 18b5262f sc.w a2,a1,(a0)
244: 20480813 addi a6,a6,516 # 10000204 <pass+0xfffff7c> f8: 26d79263 bne a5,a3,35c <fail>
248: 07e00593 li a1,126 fc: 26061063 bnez a2,35c <fail>
24c: 07f00613 li a2,127 100: 00052703 lw a4,0(a0)
250: 08000693 li a3,128 104: 24e59c63 bne a1,a4,35c <fail>
254: 08100893 li a7,129 108: 00500e13 li t3,5
258: 00d52023 sw a3,0(a0) 10c: 10000537 lui a0,0x10000
25c: 01182023 sw a7,0(a6) 110: 00850513 addi a0,a0,8 # 10000008 <pass+0xffffca0>
260: 100827af lr.w a5,(a6) 114: 06d00593 li a1,109
264: 18b5262f sc.w a2,a1,(a0) 118: 06e00613 li a2,110
268: 00100713 li a4,1 11c: 06f00693 li a3,111
26c: 00e61863 bne a2,a4,27c <fail> 120: 00d52023 sw a3,0(a0)
270: 00082703 lw a4,0(a6) 124: 18b5262f sc.w a2,a1,(a0)
274: 00e89463 bne a7,a4,27c <fail> 128: 22061a63 bnez a2,35c <fail>
278: 0100006f j 288 <pass> 12c: 00052703 lw a4,0(a0)
130: 22e59663 bne a1,a4,35c <fail>
134: 00600e13 li t3,6
138: 10000537 lui a0,0x10000
13c: 00c50513 addi a0,a0,12 # 1000000c <pass+0xffffca4>
140: 07000593 li a1,112
144: 07100613 li a2,113
148: 07200693 li a3,114
14c: 10000437 lui s0,0x10000
150: 01040413 addi s0,s0,16 # 10000010 <pass+0xffffca8>
154: 07300493 li s1,115
158: 07400913 li s2,116
15c: 07500993 li s3,117
160: 00d52023 sw a3,0(a0)
164: 01342023 sw s3,0(s0)
168: 100527af lr.w a5,(a0)
16c: 10042aaf lr.w s5,(s0)
170: 18b5262f sc.w a2,a1,(a0)
174: 1894292f sc.w s2,s1,(s0)
178: 1ed79263 bne a5,a3,35c <fail>
17c: 1e061063 bnez a2,35c <fail>
180: 00052703 lw a4,0(a0)
184: 1ce59c63 bne a1,a4,35c <fail>
188: 1d3a9a63 bne s5,s3,35c <fail>
18c: 1c091863 bnez s2,35c <fail>
190: 00042a03 lw s4,0(s0)
194: 1d449463 bne s1,s4,35c <fail>
198: 00700e13 li t3,7
19c: 10000537 lui a0,0x10000
1a0: 01450513 addi a0,a0,20 # 10000014 <pass+0xffffcac>
1a4: 07800593 li a1,120
1a8: 07900613 li a2,121
1ac: 07a00693 li a3,122
1b0: 01000e93 li t4,16
0000027c <fail>: 000001b4 <test7>:
27c: f0100137 lui sp,0xf0100 1b4: 00d52023 sw a3,0(a0)
280: f2410113 addi sp,sp,-220 # f00fff24 <pass+0xf00ffc9c> 1b8: 100527af lr.w a5,(a0)
284: 01c12023 sw t3,0(sp) 1bc: 18b5262f sc.w a2,a1,(a0)
1c0: 18d79e63 bne a5,a3,35c <fail>
1c4: 18061c63 bnez a2,35c <fail>
1c8: 00052703 lw a4,0(a0)
1cc: 18e59863 bne a1,a4,35c <fail>
1d0: fffe8e93 addi t4,t4,-1
1d4: 00450513 addi a0,a0,4
1d8: 00358593 addi a1,a1,3
1dc: 00360613 addi a2,a2,3
1e0: 00368693 addi a3,a3,3
1e4: fc0e98e3 bnez t4,1b4 <test7>
1e8: 00800e13 li t3,8
1ec: 10000537 lui a0,0x10000
1f0: 01850513 addi a0,a0,24 # 10000018 <pass+0xffffcb0>
1f4: 07800593 li a1,120
1f8: 07900613 li a2,121
1fc: 07a00693 li a3,122
200: 00052783 lw a5,0(a0)
204: 18b5262f sc.w a2,a1,(a0)
208: 00100713 li a4,1
20c: 14e61863 bne a2,a4,35c <fail>
210: 00052703 lw a4,0(a0)
214: 14e79463 bne a5,a4,35c <fail>
218: 00900e13 li t3,9
21c: 10000537 lui a0,0x10000
220: 10050513 addi a0,a0,256 # 10000100 <pass+0xffffd98>
224: 07b00593 li a1,123
228: 07c00613 li a2,124
22c: 07d00693 li a3,125
230: 00d52023 sw a3,0(a0)
234: 100527af lr.w a5,(a0)
238: 00000073 ecall
23c: 18b5262f sc.w a2,a1,(a0)
240: 00100713 li a4,1
244: 10e61c63 bne a2,a4,35c <fail>
248: 00052703 lw a4,0(a0)
24c: 10e69863 bne a3,a4,35c <fail>
250: 00a00e13 li t3,10
254: 10000537 lui a0,0x10000
258: 20050513 addi a0,a0,512 # 10000200 <pass+0xffffe98>
25c: 10000837 lui a6,0x10000
260: 20480813 addi a6,a6,516 # 10000204 <pass+0xffffe9c>
264: 07e00593 li a1,126
268: 07f00613 li a2,127
26c: 08000693 li a3,128
270: 08100893 li a7,129
274: 00d52023 sw a3,0(a0)
278: 01182023 sw a7,0(a6)
27c: 100827af lr.w a5,(a6)
280: 18b5262f sc.w a2,a1,(a0)
284: 00100713 li a4,1
288: 0ce61a63 bne a2,a4,35c <fail>
28c: 00082703 lw a4,0(a6)
290: 0ce89663 bne a7,a4,35c <fail>
294: 00b00e13 li t3,11
298: 10000537 lui a0,0x10000
29c: 30050513 addi a0,a0,768 # 10000300 <pass+0xfffff98>
2a0: 08200593 li a1,130
2a4: 08300613 li a2,131
2a8: 08400693 li a3,132
2ac: 00d52023 sw a3,0(a0)
2b0: 00001eb7 lui t4,0x1
2b4: 800e8e93 addi t4,t4,-2048 # 800 <pass+0x498>
2b8: 304e9073 csrw mie,t4
2bc: 00800e93 li t4,8
2c0: 100527af lr.w a5,(a0)
2c4: 300e9073 csrw mstatus,t4
2c8: 00000013 nop
2cc: 00000013 nop
2d0: 00000013 nop
2d4: 00000013 nop
2d8: 00000013 nop
2dc: 00000013 nop
2e0: 18b5262f sc.w a2,a1,(a0)
2e4: 00100713 li a4,1
2e8: 06e61a63 bne a2,a4,35c <fail>
2ec: 00052703 lw a4,0(a0)
2f0: 06e69663 bne a3,a4,35c <fail>
2f4: 00c00e13 li t3,12
2f8: 10000537 lui a0,0x10000
2fc: 40050513 addi a0,a0,1024 # 10000400 <pass+0x10000098>
300: 08c00593 li a1,140
304: 08d00613 li a2,141
308: 08e00693 li a3,142
30c: 00d52023 sw a3,0(a0)
310: 00001eb7 lui t4,0x1
314: 800e8e93 addi t4,t4,-2048 # 800 <pass+0x498>
318: 304e9073 csrw mie,t4
31c: 00002eb7 lui t4,0x2
320: 808e8e93 addi t4,t4,-2040 # 1808 <pass+0x14a0>
324: 100527af lr.w a5,(a0)
328: 300e9073 csrw mstatus,t4
32c: 00000013 nop
330: 00000013 nop
334: 00000013 nop
338: 00000013 nop
33c: 00000013 nop
340: 00000013 nop
344: 18b5262f sc.w a2,a1,(a0)
348: 00100713 li a4,1
34c: 00e61863 bne a2,a4,35c <fail>
350: 00052703 lw a4,0(a0)
354: 00e69463 bne a3,a4,35c <fail>
358: 0100006f j 368 <pass>
00000288 <pass>: 0000035c <fail>:
288: f0100137 lui sp,0xf0100 35c: f0100137 lui sp,0xf0100
28c: f2010113 addi sp,sp,-224 # f00fff20 <pass+0xf00ffc98> 360: f2410113 addi sp,sp,-220 # f00fff24 <pass+0xf00ffbbc>
290: 00012023 sw zero,0(sp) 364: 01c12023 sw t3,0(sp)
294: 00000013 nop
298: 00000013 nop 00000368 <pass>:
29c: 00000013 nop 368: f0100137 lui sp,0xf0100
2a0: 00000013 nop 36c: f2010113 addi sp,sp,-224 # f00fff20 <pass+0xf00ffbb8>
2a4: 00000013 nop 370: 00012023 sw zero,0(sp)
2a8: 00000013 nop 374: 00000013 nop
378: 00000013 nop
37c: 00000013 nop
380: 00000013 nop
384: 00000013 nop
388: 00000013 nop

BIN
src/test/cpp/custom/atomic/build/atomic.elf
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100
src/test/cpp/custom/atomic/build/atomic.hex
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@ -1,45 +1,59 @@
:100000006F00000313000000130000001300000045 :100000006F00C00413000000130000001300000084
:100010001300000013000000130000001300000094 :100010001300000013000000130000001300000094
:10002000F32E1034938E4E0073901E3473002030E4 :10002000F32E003093FE0E08638A0E00B72E0000F8
:10003000130E1000370500109305400613065006F6 :10003000938E0E8073900E3073002030F32E1034A8
:10004000930660062320D5002F26B518130710004D :10004000938E4E0073901E3473002030130E1000F8
:100050006316E622032705006392E622130E2000B2 :100050003705001093054006130650069306600608
:10006000370500101305450093057006130680063A :100060002320D5002F26B518130710006318E62E9D
:10007000930690062320D5002F26B51813071000ED :10007000032705006394E62E130E200037050010B9
:10008000631EE61E03270500639AE61E130E30006A :100080001305450093057006130680069306900637
:10009000370500101305450093057006130680060A :100090002320D5002F26B518130710006310E62C77
:1000A000930690062F26B518130710006318E61C58 :1000A00003270500639CE62A130E30003705001075
:1000B000032705006394E61C130E4000370500106B :1000B0001305450093057006130680069306900607
:1000C000130585009305A0061306B0069306C00627 :1000C0002F26B51813071000631AE628032705002A
:1000D0002320D500AF2705102F26B5186390D71A17 :1000D0006396E628130E40003705001013058500CF
:1000E000631E061803270500639AE518130E5000D7 :1000E0009305A0061306B0069306C0062320D5008C
:1000F00037050010130585009305D0061306E006AA :1000F000AF2705102F26B5186392D7266310062662
:100100009306F0062320D5002F26B518631806168F :1001000003270500639CE524130E500037050010FB
:10011000032705006394E516130E600037050010F1 :10011000130585009305D0061306E0069306F00646
:100120001305C50093050007130610079306200763 :100120002320D5002F26B518631A062203270500C1
:100130003704001013040401930430071309400727 :100130006396E522130E6000370500101305C50015
:10014000930950072320D50023203401AF27051041 :1001400093050007130610079306200737040010D5
:10015000AF2A04102F26B5182F2994186390D712B0 :10015000130404019304300713094007930950075F
:10016000631E061003270500639AE51063983A1191 :100160002320D50023203401AF270510AF2A041027
:1001700063160910032A040063924411130E7000E1 :100170002F26B5182F2994186392D71E6310061ED8
:1001800037050010130545019305800713069007F6 :1001800003270500639CE51C639A3A1D6318091C4C
:100190009306A007930E00012320D500AF2705107A :10019000032A04006394441D130E700037050010F9
:1001A0002F26B518639CD70C631A060C032705008D :1001A0001305450193058007130690079306A007E2
:1001B0006396E50C938EFEFF13054500938535008D :1001B000930E00012320D500AF2705102F26B51878
:1001C0001306360093863600E3980EFC130E80006B :1001C000639ED718631C0618032705006398E5187B
:1001D0003705001013058501930580071306900766 :1001D000938EFEFF13054500938535001306360008
:1001E0009306A007832705002F26B51813071000D4 :1001E00093863600E3980EFC130E8000370500104E
:1001F0006316E608032705006392E708130E9000D4 :1001F0001305850193058007130690079306A00752
:1002000037050010130505109305B0071306C00746 :10020000832705002F26B518130710006318E6147E
:100210009306D0072320D500AF27051073000000F8 :10021000032705006394E714130E900037050010C0
:100220002F26B51813071000631AE60403270500EC :10022000130505109305B0071306C0079306D00702
:100230006396E604130E90003705001013050520A1 :100230002320D500AF270510730000002F26B51826
:1002400037080010130848209305E0071306F0074D :1002400013071000631CE610032705006398E610EF
:1002500093060008930810082320D50023201801D6 :10025000130EA00037050010130505203708001005
:10026000AF2708102F26B518130710006318E600F3 :10026000130848209305E0071306F00793060008DB
:10027000032708006394E8006F000001370110F0C5 :10027000930810082320D50023201801AF27081069
:10028000130141F22320C101370110F0130101F2E3 :100280002F26B51813071000631AE60C0327080081
:1002900023200100130000001300000013000000E1 :100290006396E80C130EB000370500101305053007
:0C02A00013000000130000001300000019 :1002A0009305200813063008930640082320D50044
:0400000300000030C9 :1002B000B71E0000938E0E8073904E30930E800018
:1002C000AF27051073900E301300000013000000DC
:1002D00013000000130000001300000013000000D2
:1002E0002F26B51813071000631AE606032705002A
:1002F0006396E606130EC00037050010130505408F
:100300009305C0081306D0089306E0082320D50003
:10031000B71E0000938E0E8073904E30B72E0000F3
:10032000938E8E80AF27051073900E30130000005F
:100330001300000013000000130000001300000071
:10034000130000002F26B518130710006318E600ED
:10035000032705006394E6006F000001370110F0E9
:10036000130141F22320C101370110F0130101F202
:100370002320010013000000130000001300000000
:0C03800013000000130000001300000038
:040000030000004CAD
:00000001FF :00000001FF

14
src/test/cpp/custom/atomic/build/atomic.map
View File

@ -16,16 +16,16 @@ END GROUP
LOAD /opt/riscv/bin/../lib/gcc/riscv64-unknown-elf/7.1.1/libgcc.a LOAD /opt/riscv/bin/../lib/gcc/riscv64-unknown-elf/7.1.1/libgcc.a
0x0000000000000000 . = 0x0 0x0000000000000000 . = 0x0
.crt_section 0x0000000000000000 0x2ac .crt_section 0x0000000000000000 0x38c
0x0000000000000000 . = ALIGN (0x4) 0x0000000000000000 . = ALIGN (0x4)
*crt.o(.text) *crt.o(.text)
.text 0x0000000000000000 0x2ac build/src/crt.o .text 0x0000000000000000 0x38c build/src/crt.o
0x0000000000000020 trap_entry 0x0000000000000020 trap_entry
0x0000000000000030 _start 0x000000000000004c _start
OUTPUT(build/atomic.elf elf32-littleriscv) OUTPUT(build/atomic.elf elf32-littleriscv)
.data 0x00000000000002ac 0x0 .data 0x000000000000038c 0x0
.data 0x00000000000002ac 0x0 build/src/crt.o .data 0x000000000000038c 0x0 build/src/crt.o
.bss 0x00000000000002ac 0x0 .bss 0x000000000000038c 0x0
.bss 0x00000000000002ac 0x0 build/src/crt.o .bss 0x000000000000038c 0x0 build/src/crt.o

92
src/test/cpp/custom/atomic/build/atomic.v
View File

@ -1,44 +1,58 @@
@00000000 @00000000
6F 00 00 03 13 00 00 00 13 00 00 00 13 00 00 00 6F 00 C0 04 13 00 00 00 13 00 00 00 13 00 00 00
13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00
F3 2E 10 34 93 8E 4E 00 73 90 1E 34 73 00 20 30 F3 2E 00 30 93 FE 0E 08 63 8A 0E 00 B7 2E 00 00
13 0E 10 00 37 05 00 10 93 05 40 06 13 06 50 06 93 8E 0E 80 73 90 0E 30 73 00 20 30 F3 2E 10 34
93 06 60 06 23 20 D5 00 2F 26 B5 18 13 07 10 00 93 8E 4E 00 73 90 1E 34 73 00 20 30 13 0E 10 00
63 16 E6 22 03 27 05 00 63 92 E6 22 13 0E 20 00 37 05 00 10 93 05 40 06 13 06 50 06 93 06 60 06
37 05 00 10 13 05 45 00 93 05 70 06 13 06 80 06 23 20 D5 00 2F 26 B5 18 13 07 10 00 63 18 E6 2E
93 06 90 06 23 20 D5 00 2F 26 B5 18 13 07 10 00 03 27 05 00 63 94 E6 2E 13 0E 20 00 37 05 00 10
63 1E E6 1E 03 27 05 00 63 9A E6 1E 13 0E 30 00 13 05 45 00 93 05 70 06 13 06 80 06 93 06 90 06
37 05 00 10 13 05 45 00 93 05 70 06 13 06 80 06 23 20 D5 00 2F 26 B5 18 13 07 10 00 63 10 E6 2C
93 06 90 06 2F 26 B5 18 13 07 10 00 63 18 E6 1C 03 27 05 00 63 9C E6 2A 13 0E 30 00 37 05 00 10
03 27 05 00 63 94 E6 1C 13 0E 40 00 37 05 00 10 13 05 45 00 93 05 70 06 13 06 80 06 93 06 90 06
13 05 85 00 93 05 A0 06 13 06 B0 06 93 06 C0 06 2F 26 B5 18 13 07 10 00 63 1A E6 28 03 27 05 00
23 20 D5 00 AF 27 05 10 2F 26 B5 18 63 90 D7 1A 63 96 E6 28 13 0E 40 00 37 05 00 10 13 05 85 00
63 1E 06 18 03 27 05 00 63 9A E5 18 13 0E 50 00 93 05 A0 06 13 06 B0 06 93 06 C0 06 23 20 D5 00
37 05 00 10 13 05 85 00 93 05 D0 06 13 06 E0 06 AF 27 05 10 2F 26 B5 18 63 92 D7 26 63 10 06 26
93 06 F0 06 23 20 D5 00 2F 26 B5 18 63 18 06 16 03 27 05 00 63 9C E5 24 13 0E 50 00 37 05 00 10
03 27 05 00 63 94 E5 16 13 0E 60 00 37 05 00 10 13 05 85 00 93 05 D0 06 13 06 E0 06 93 06 F0 06
13 05 C5 00 93 05 00 07 13 06 10 07 93 06 20 07 23 20 D5 00 2F 26 B5 18 63 1A 06 22 03 27 05 00
37 04 00 10 13 04 04 01 93 04 30 07 13 09 40 07 63 96 E5 22 13 0E 60 00 37 05 00 10 13 05 C5 00
93 09 50 07 23 20 D5 00 23 20 34 01 AF 27 05 10 93 05 00 07 13 06 10 07 93 06 20 07 37 04 00 10
AF 2A 04 10 2F 26 B5 18 2F 29 94 18 63 90 D7 12 13 04 04 01 93 04 30 07 13 09 40 07 93 09 50 07
63 1E 06 10 03 27 05 00 63 9A E5 10 63 98 3A 11 23 20 D5 00 23 20 34 01 AF 27 05 10 AF 2A 04 10
63 16 09 10 03 2A 04 00 63 92 44 11 13 0E 70 00 2F 26 B5 18 2F 29 94 18 63 92 D7 1E 63 10 06 1E
37 05 00 10 13 05 45 01 93 05 80 07 13 06 90 07 03 27 05 00 63 9C E5 1C 63 9A 3A 1D 63 18 09 1C
93 06 A0 07 93 0E 00 01 23 20 D5 00 AF 27 05 10 03 2A 04 00 63 94 44 1D 13 0E 70 00 37 05 00 10
2F 26 B5 18 63 9C D7 0C 63 1A 06 0C 03 27 05 00 13 05 45 01 93 05 80 07 13 06 90 07 93 06 A0 07
63 96 E5 0C 93 8E FE FF 13 05 45 00 93 85 35 00 93 0E 00 01 23 20 D5 00 AF 27 05 10 2F 26 B5 18
13 06 36 00 93 86 36 00 E3 98 0E FC 13 0E 80 00 63 9E D7 18 63 1C 06 18 03 27 05 00 63 98 E5 18
37 05 00 10 13 05 85 01 93 05 80 07 13 06 90 07 93 8E FE FF 13 05 45 00 93 85 35 00 13 06 36 00
93 06 A0 07 83 27 05 00 2F 26 B5 18 13 07 10 00 93 86 36 00 E3 98 0E FC 13 0E 80 00 37 05 00 10
63 16 E6 08 03 27 05 00 63 92 E7 08 13 0E 90 00 13 05 85 01 93 05 80 07 13 06 90 07 93 06 A0 07
37 05 00 10 13 05 05 10 93 05 B0 07 13 06 C0 07 83 27 05 00 2F 26 B5 18 13 07 10 00 63 18 E6 14
93 06 D0 07 23 20 D5 00 AF 27 05 10 73 00 00 00 03 27 05 00 63 94 E7 14 13 0E 90 00 37 05 00 10
2F 26 B5 18 13 07 10 00 63 1A E6 04 03 27 05 00 13 05 05 10 93 05 B0 07 13 06 C0 07 93 06 D0 07
63 96 E6 04 13 0E 90 00 37 05 00 10 13 05 05 20 23 20 D5 00 AF 27 05 10 73 00 00 00 2F 26 B5 18
37 08 00 10 13 08 48 20 93 05 E0 07 13 06 F0 07 13 07 10 00 63 1C E6 10 03 27 05 00 63 98 E6 10
93 06 00 08 93 08 10 08 23 20 D5 00 23 20 18 01 13 0E A0 00 37 05 00 10 13 05 05 20 37 08 00 10
AF 27 08 10 2F 26 B5 18 13 07 10 00 63 18 E6 00 13 08 48 20 93 05 E0 07 13 06 F0 07 93 06 00 08
03 27 08 00 63 94 E8 00 6F 00 00 01 37 01 10 F0 93 08 10 08 23 20 D5 00 23 20 18 01 AF 27 08 10
2F 26 B5 18 13 07 10 00 63 1A E6 0C 03 27 08 00
63 96 E8 0C 13 0E B0 00 37 05 00 10 13 05 05 30
93 05 20 08 13 06 30 08 93 06 40 08 23 20 D5 00
B7 1E 00 00 93 8E 0E 80 73 90 4E 30 93 0E 80 00
AF 27 05 10 73 90 0E 30 13 00 00 00 13 00 00 00
13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00
2F 26 B5 18 13 07 10 00 63 1A E6 06 03 27 05 00
63 96 E6 06 13 0E C0 00 37 05 00 10 13 05 05 40
93 05 C0 08 13 06 D0 08 93 06 E0 08 23 20 D5 00
B7 1E 00 00 93 8E 0E 80 73 90 4E 30 B7 2E 00 00
93 8E 8E 80 AF 27 05 10 73 90 0E 30 13 00 00 00
13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00
13 00 00 00 2F 26 B5 18 13 07 10 00 63 18 E6 00
03 27 05 00 63 94 E6 00 6F 00 00 01 37 01 10 F0
13 01 41 F2 23 20 C1 01 37 01 10 F0 13 01 01 F2 13 01 41 F2 23 20 C1 01 37 01 10 F0 13 01 01 F2
23 20 01 00 13 00 00 00 13 00 00 00 13 00 00 00 23 20 01 00 13 00 00 00 13 00 00 00 13 00 00 00
13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00 13 00 00 00

62
src/test/cpp/custom/atomic/src/crt.S
View File

@ -12,6 +12,14 @@
.global trap_entry .global trap_entry
trap_entry: trap_entry:
csrr x29, mstatus
and x29, x29, 0x080
beqz x29, notExternalInterrupt
li x29, 0x1800 //000 disable interrupts
csrw mstatus,x29
mret
notExternalInterrupt:
csrr x29, mepc csrr x29, mepc
addi x29, x29, 4 addi x29, x29, 4
csrw mepc, x29 csrw mepc, x29
@ -167,7 +175,7 @@ test7:
//Test 10 SC should fail if the address doesn't match //Test 10 SC should fail if the address doesn't match
li x28, 9 li x28, 10
li a0, 0x10000200 li a0, 0x10000200
li a6, 0x10000204 li a6, 0x10000204
li a1, 126 li a1, 126
@ -184,6 +192,58 @@ test7:
bne a7, a4, fail bne a7, a4, fail
//Test 11 SC should fail after a external interrupt context switching
li x28, 11
li a0, 0x10000300
li a1, 130
li a2, 131
li a3, 132
sw a3, 0(a0)
li x29, 0x800 //800 external interrupts
csrw mie,x29
li x29, 0x008 //008 enable interrupts
lr.w a5, (a0)
csrw mstatus,x29 //Enable external interrupt (will jump instantly due to testbench setup)
nop
nop
nop
nop
nop
nop
sc.w a2, a1, (a0)
li a4, 1
bne a2, a4, fail
lw a4, 0(a0)
bne a3, a4, fail
//Test 12 SC should fail after a external interrupt context switching (callback on lr)
li x28, 12
li a0, 0x10000400
li a1, 140
li a2, 141
li a3, 142
sw a3, 0(a0)
li x29, 0x800 //800 external interrupts
csrw mie,x29
li x29, 0x1808 //008 enable interrupts
lr.w a5, (a0)
csrw mstatus,x29 //Enable external interrupt (will jump instantly due to testbench setup)
nop
nop
nop
nop
nop
nop
sc.w a2, a1, (a0)
li a4, 1
bne a2, a4, fail
lw a4, 0(a0)
bne a3, a4, fail
j pass j pass

32
src/test/cpp/regression/atomic.gtkw
View File

@ -1,21 +1,21 @@
[*] [*]
[*] GTKWave Analyzer v3.3.58 (w)1999-2014 BSI [*] GTKWave Analyzer v3.3.58 (w)1999-2014 BSI
[*] Thu Jan 4 14:37:30 2018 [*] Thu Jan 4 16:18:18 2018
[*] [*]
[dumpfile] "/home/spinalvm/hdl/VexRiscv/src/test/cpp/regression/atomic.vcd" [dumpfile] "/home/spinalvm/hdl/VexRiscv/src/test/cpp/regression/atomic.vcd"
[dumpfile_mtime] "Thu Jan 4 14:36:32 2018" [dumpfile_mtime] "Thu Jan 4 16:18:11 2018"
[dumpfile_size] 1406668 [dumpfile_size] 19545269
[savefile] "/home/spinalvm/hdl/VexRiscv/src/test/cpp/regression/atomic.gtkw" [savefile] "/home/spinalvm/hdl/VexRiscv/src/test/cpp/regression/atomic.gtkw"
[timestart] 515 [timestart] 1478
[size] 1784 950 [size] 1784 950
[pos] -383 -155 [pos] -1 -1
*-7.000000 727 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 *-7.000000 1726 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
[treeopen] TOP. [treeopen] TOP.
[treeopen] TOP.VexRiscv. [treeopen] TOP.VexRiscv.
[sst_width] 289 [sst_width] 289
[signals_width] 486 [signals_width] 559
[sst_expanded] 1 [sst_expanded] 1
[sst_vpaned_height] 271 [sst_vpaned_height] 191
@22 @22
TOP.VexRiscv.writeBack_RegFilePlugin_regFileWrite_payload_address[4:0] TOP.VexRiscv.writeBack_RegFilePlugin_regFileWrite_payload_address[4:0]
TOP.VexRiscv.writeBack_RegFilePlugin_regFileWrite_payload_data[31:0] TOP.VexRiscv.writeBack_RegFilePlugin_regFileWrite_payload_data[31:0]
@ -32,5 +32,21 @@ TOP.VexRiscv.dataCache_1.stageB_atomic_entries_1_address[31:0]
@28 @28
TOP.VexRiscv.dataCache_1.stageB_atomic_entries_1_size[1:0] TOP.VexRiscv.dataCache_1.stageB_atomic_entries_1_size[1:0]
TOP.VexRiscv.dataCache_1.stageB_atomic_entries_1_valid TOP.VexRiscv.dataCache_1.stageB_atomic_entries_1_valid
@29
[color] 1
TOP.VexRiscv.writeBack_arbitration_isFiring
[color] 1
TOP.VexRiscv.writeBack_arbitration_isValid
@23
[color] 1
TOP.VexRiscv.writeBack_PC[31:0]
@28
TOP.VexRiscv.CsrPlugin_mstatus_MIE
TOP.VexRiscv.CsrPlugin_mstatus_MPIE
TOP.VexRiscv.CsrPlugin_mstatus_MPP[1:0]
@24
TOP.VexRiscv.RegFilePlugin_regFile(28)[31:0]
@22
TOP.VexRiscv.CsrPlugin_mepc[31:0]
[pattern_trace] 1 [pattern_trace] 1
[pattern_trace] 0 [pattern_trace] 0

2
src/test/cpp/regression/main.cpp
View File

@ -1727,7 +1727,7 @@ int main(int argc, char **argv, char **env) {
#ifdef ATOMIC #ifdef ATOMIC
redo(REDO,Workspace("atomic").loadHex("../custom/atomic/build/atomic.hex")->bootAt(0x00000000u)->run(50e3);); redo(REDO,Workspace("atomic").loadHex("../custom/atomic/build/atomic.hex")->bootAt(0x00000000u)->run(10e3););
#endif #endif
#ifdef DHRYSTONE #ifdef DHRYSTONE