IcestormFlow add ultraplus support
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@ -50,7 +50,7 @@ object IcestormFlow {
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workspacePathFile.mkdir()
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FileUtils.copyFileToDirectory(new File(toplevelPath), workspacePathFile)
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doCmd(List("yosys", "-v3", "-p", s"synth_ice40 -top $projectName -blif ${projectName}.blif", s"$projectName.v" ), workspacePath)
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val arachne = doCmd(List("arachne-pnr", "-d", device.replace("hx",""), "--max-passes", "600", "-P", pack, s"$projectName.blif" ,"-o", s"$projectName.asc"), workspacePath)
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val arachne = doCmd(List("arachne-pnr", "-d", device.replace("hx","").replace("up",""), "--max-passes", "600", "-P", pack, s"$projectName.blif" ,"-o", s"$projectName.asc"), workspacePath)
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doCmd(List("icepack", s"$projectName.asc", s"$projectName.bin"), workspacePath)
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val icetime = doCmd(List("icetime", "-tmd", device, s"${projectName}.asc"), workspacePath)
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new Report{
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@ -138,13 +138,24 @@ object IcestormFlow {
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}
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def main(args: Array[String]) {
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// SpinalVerilog(StreamFifo(Bits(8 bits), 64))
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// val report = IcestormFlow(
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// workspacePath="/home/spinalvm/tmp",
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// toplevelPath="StreamFifo.v",
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// family="iCE40",
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// device="hx8k",
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// pack = "ct256"
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// )
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// println(report.getArea())
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// println(report.getFMax())
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// }
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SpinalVerilog(StreamFifo(Bits(8 bits), 64))
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val report = IcestormFlow(
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workspacePath="/home/spinalvm/tmp",
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toplevelPath="VexRiscv.v",
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toplevelPath="StreamFifo.v",
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family="iCE40",
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device="hx8k",
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pack = "ct256"
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device="up5k",
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pack = "sg48"
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)
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println(report.getArea())
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println(report.getFMax())
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@ -166,6 +177,19 @@ object IcestormStdTargets {
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)
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}
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}
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targets += new Target {
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override def getFamilyName(): String = "iCE40Ultra"
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override def synthesise(rtl: Rtl, workspace: String): Report = {
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IcestormFlow(
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workspacePath=workspace,
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toplevelPath=rtl.getRtlPath(),
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family=getFamilyName(),
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device="up5k",
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pack = "sg48"
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)
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}
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}
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targets
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}
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}
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